Starting with commit aaa23c350715 ("x86: Optimize strlen-avx2.S"), the optimized AVX2 string functions uses the bzhiq and sarxl instructions, causing SIGILL on CPU which does have AVX2 instructions, but does not have BMI2 instructions. For instance this happens on a Intel(R) Core(TM) i3-4000M CPU @ 2.40GHz: cpu family : 6 model : 60 model name : Intel(R) Core(TM) i3-4000M CPU @ 2.40GHz stepping : 3 microcode : 0x12 It *seems* that upgrading the microcode to level 0x28 fixes the issue. That said why it is acceptable to have performance issues with an older microcode, this should not prevent a system to boot. This has been reported to affected Debian Bullseye (as the optimization have been backported to the upstream release/2.31/master tree), Debian Sid and Fedora Rawhide. I think that the code should probably be reverted, or at least the IFUNC functions using BMI2 instructions should be probably be gated by the CPU flag. It also poses the question of backporting optimizations to stable release trees.
> It *seems* that upgrading the microcode to level 0x28 fixes the issue. This is confirmed, the microcode update brings the following flags: tsc_deadline_timer ssbd ibrs ibpb stibp bmi1 bmi2 md_clear flush_l1d
This was fixed by: commit 83c5b368226c34a2f0a5287df40fc290b2b34359 Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Apr 19 10:45:07 2021 -0700 x86-64: Require BMI2 for strchr-avx2.S Which we can probably backport easily. The issue is that some avx2 changes where backported without the surrounding ifunc code. Note: This will also be an issue for memchr-avx2.S
(In reply to Noah Goldstein from comment #2) > This was fixed by: > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > Author: H.J. Lu <hjl.tools@gmail.com> > Date: Mon Apr 19 10:45:07 2021 -0700 > > x86-64: Require BMI2 for strchr-avx2.S > > Which we can probably backport easily. The issue is that some avx2 changes > where backported without the surrounding ifunc code. > I think this needs to be backported to: 2.28-2.32 I applies cleanly on 2.32 but for 2.28 - 2.31 it depends on: commit 107e6a3c2212ba7a3a4ec7cae8d82d73f7c95d0b (HEAD) Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Jun 29 16:36:08 2020 -0700 x86: Support usable check for all CPU features > > > > Note: This will also be an issue for memchr-avx2.S
(In reply to Noah Goldstein from comment #2) > This was fixed by: > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > Author: H.J. Lu <hjl.tools@gmail.com> > Date: Mon Apr 19 10:45:07 2021 -0700 > > x86-64: Require BMI2 for strchr-avx2.S > > Which we can probably backport easily. The issue is that some avx2 changes > where backported without the surrounding ifunc code. > > > > > Note: This will also be an issue for memchr-avx2.S According to the bug report in Debian, there is also memchr-avx2.S and strlen-avx2.S.
(In reply to Noah Goldstein from comment #3) > (In reply to Noah Goldstein from comment #2) > > This was fixed by: > > > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > > Author: H.J. Lu <hjl.tools@gmail.com> > > Date: Mon Apr 19 10:45:07 2021 -0700 > > > > x86-64: Require BMI2 for strchr-avx2.S > > > > Which we can probably backport easily. The issue is that some avx2 changes > > where backported without the surrounding ifunc code. > > > > I think this needs to be backported to: > 2.28-2.32 > > I applies cleanly on 2.32 > > but for 2.28 - 2.31 it depends on: > > commit 107e6a3c2212ba7a3a4ec7cae8d82d73f7c95d0b (HEAD) > Author: H.J. Lu <hjl.tools@gmail.com> > Date: Mon Jun 29 16:36:08 2020 -0700 > > x86: Support usable check for all CPU features > If that one is too complicated to backport to 2.31, maybe it's easier to revert the optimization in 2.31?
(In reply to Aurelien Jarno from comment #5) > (In reply to Noah Goldstein from comment #3) > > (In reply to Noah Goldstein from comment #2) > > > This was fixed by: > > > > > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > > > Author: H.J. Lu <hjl.tools@gmail.com> > > > Date: Mon Apr 19 10:45:07 2021 -0700 > > > > > > x86-64: Require BMI2 for strchr-avx2.S > > > > > > Which we can probably backport easily. The issue is that some avx2 changes > > > where backported without the surrounding ifunc code. > > > > > > > I think this needs to be backported to: > > 2.28-2.32 > > > > I applies cleanly on 2.32 > > > > but for 2.28 - 2.31 it depends on: > > > > commit 107e6a3c2212ba7a3a4ec7cae8d82d73f7c95d0b (HEAD) > > Author: H.J. Lu <hjl.tools@gmail.com> > > Date: Mon Jun 29 16:36:08 2020 -0700 > > > > x86: Support usable check for all CPU features > > > > If that one is too complicated to backport to 2.31, maybe it's easier to > revert the optimization in 2.31? Would like to get H.Js opinion on that, but maybe.
We need to add BMI2 check to IFUNC selectors which need BMI2.
Created attachment 14363 [details] 2.31-2.30-2.29-2.28 patch
Created attachment 14364 [details] 2.32.patch
(In reply to Sunil Pandey from comment #9) > Created attachment 14364 [details] > 2.32.patch all patches are missing memchr-avx2 BMI2 check in ifunc-impl-list. This isn't 100% needed to fix the bug. Think worth it to add? I'd say for 2.28-2.31 makes sense given that we are already modifying H.J's patch. For 2.32 can see either way.
Before trying to fix that in older branches, we should start by fixing master. 3 groups of functions are using BMI2: memchr, strchr and strlen. * strchr is fixed by this commit: commit 83c5b368226c34a2f0a5287df40fc290b2b34359 Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Apr 19 10:45:07 2021 -0700 x86-64: Require BMI2 for strchr-avx2.S * strlen is fixed by this commit: commit aaa23c35071537e2dcf5807e956802ed215210aa Author: Noah Goldstein <goldstein.w.n@gmail.com> Date: Mon Apr 19 19:36:07 2021 -0400 x86: Optimize strlen-avx2.S * memchr is not yet fixed in master So the first step is to fix memchr.
(In reply to Aurelien Jarno from comment #11) > Before trying to fix that in older branches, we should start by fixing > master. 3 groups of functions are using BMI2: memchr, strchr and strlen. > * strchr is fixed by this commit: > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > Author: H.J. Lu <hjl.tools@gmail.com> > Date: Mon Apr 19 10:45:07 2021 -0700 > > x86-64: Require BMI2 for strchr-avx2.S > > * strlen is fixed by this commit: > > commit aaa23c35071537e2dcf5807e956802ed215210aa > Author: Noah Goldstein <goldstein.w.n@gmail.com> > Date: Mon Apr 19 19:36:07 2021 -0400 > > x86: Optimize strlen-avx2.S > > * memchr is not yet fixed in master memchr should be fine in master. It uses ifunc-evex.h which has a BMI2 check for avx2: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ifunc-evex.h;h=310cfd269f5e4a4a94e96ab971201ae55a41b0b8;hb=HEAD#l37 > > So the first step is to fix memchr.
You shouldn't see any issue on any one of these function as ifunc selector got changed and it's shared across. ifunc-impl-list affects only if you are doing different implementation benchmarking on affected machine.
Created attachment 14368 [details] 2.32.patch.1
Created attachment 14369 [details] 2.31-2.30-2.29-2.28 patch.1
(In reply to Sunil Pandey from comment #9) > Created attachment 14364 [details] > 2.32.patch Please mention this bug in the commit message.
The release/2.32/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=f9e29095fcc11f79a3afcb4b5dd3ce070e3d4084 commit f9e29095fcc11f79a3afcb4b5dd3ce070e3d4084 Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Apr 19 10:45:07 2021 -0700 x86-64: Require BMI2 for strchr-avx2.S [BZ #29611] Since strchr-avx2.S updated by commit 1f745ecc2109890886b161d4791e1406fdfc29b8 Author: noah <goldstein.w.n@gmail.com> Date: Wed Feb 3 00:38:59 2021 -0500 x86-64: Refactor and improve performance of strchr-avx2.S uses sarx: c4 e2 72 f7 c0 sarx %ecx,%eax,%eax for strchr-avx2 family functions, require BMI2 in ifunc-impl-list.c and ifunc-avx2.h. This fixes BZ #29611. (cherry picked from commit 83c5b368226c34a2f0a5287df40fc290b2b34359)
The release/2.32/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=6bbc1a3a350655b8ca4670e0708f07d46782db3b commit 6bbc1a3a350655b8ca4670e0708f07d46782db3b Author: Sunil K Pandey <skpgkp2@gmail.com> Date: Wed Sep 28 14:33:48 2022 -0700 x86-64: Require BMI2 for avx2 functions [BZ #29611] This patch fixes BZ #29611
The release/2.31/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=b8bb48a18d9e5af6f2f036012c51cba0ee758e9d commit b8bb48a18d9e5af6f2f036012c51cba0ee758e9d Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Apr 19 10:45:07 2021 -0700 x86-64: Require BMI2 for strchr-avx2.S [BZ #29611] Since strchr-avx2.S updated by commit 1f745ecc2109890886b161d4791e1406fdfc29b8 Author: noah <goldstein.w.n@gmail.com> Date: Wed Feb 3 00:38:59 2021 -0500 x86-64: Refactor and improve performance of strchr-avx2.S uses sarx: c4 e2 72 f7 c0 sarx %ecx,%eax,%eax for strchr-avx2 family functions, require BMI2 in ifunc-impl-list.c and ifunc-avx2.h. This fixes BZ #29611. (cherry picked from commit 83c5b368226c34a2f0a5287df40fc290b2b34359)
The release/2.31/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=d4b75594574ab8a9c2c41209cd8c62aac76b5a04 commit d4b75594574ab8a9c2c41209cd8c62aac76b5a04 Author: Sunil K Pandey <skpgkp2@gmail.com> Date: Wed Sep 28 15:53:49 2022 -0700 x86-64: Require BMI2 for avx2 functions [BZ #29611] This patch fixes BZ #29611
The release/2.30/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=286c89f8c7af058e5b788f634321eee99d9b1f04 commit 286c89f8c7af058e5b788f634321eee99d9b1f04 Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Apr 19 10:45:07 2021 -0700 x86-64: Require BMI2 for strchr-avx2.S [BZ #29611] Since strchr-avx2.S updated by commit 1f745ecc2109890886b161d4791e1406fdfc29b8 Author: noah <goldstein.w.n@gmail.com> Date: Wed Feb 3 00:38:59 2021 -0500 x86-64: Refactor and improve performance of strchr-avx2.S uses sarx: c4 e2 72 f7 c0 sarx %ecx,%eax,%eax for strchr-avx2 family functions, require BMI2 in ifunc-impl-list.c and ifunc-avx2.h. This fixes BZ #29611. (cherry picked from commit 83c5b368226c34a2f0a5287df40fc290b2b34359)
The release/2.30/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=59216172e3b477cbb8c52d0b2caf205b17d893ce commit 59216172e3b477cbb8c52d0b2caf205b17d893ce Author: Sunil K Pandey <skpgkp2@gmail.com> Date: Wed Sep 28 15:53:49 2022 -0700 x86-64: Require BMI2 for avx2 functions [BZ #29611] This patch fixes BZ #29611
The release/2.29/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=986e7b911fd36bd4f38807bf25be6a1ade4d9688 commit 986e7b911fd36bd4f38807bf25be6a1ade4d9688 Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Apr 19 10:45:07 2021 -0700 x86-64: Require BMI2 for strchr-avx2.S [BZ #29611] Since strchr-avx2.S updated by commit 1f745ecc2109890886b161d4791e1406fdfc29b8 Author: noah <goldstein.w.n@gmail.com> Date: Wed Feb 3 00:38:59 2021 -0500 x86-64: Refactor and improve performance of strchr-avx2.S uses sarx: c4 e2 72 f7 c0 sarx %ecx,%eax,%eax for strchr-avx2 family functions, require BMI2 in ifunc-impl-list.c and ifunc-avx2.h. This fixes BZ #29611. (cherry picked from commit 83c5b368226c34a2f0a5287df40fc290b2b34359)
The release/2.29/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=114e3349de2ef48210c94ac39a54b0d6bd7ba2f3 commit 114e3349de2ef48210c94ac39a54b0d6bd7ba2f3 Author: Sunil K Pandey <skpgkp2@gmail.com> Date: Wed Sep 28 15:53:49 2022 -0700 x86-64: Require BMI2 for avx2 functions [BZ #29611] This patch fixes BZ #29611
The release/2.28/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=956cda8d9f222bba3558cf2949a35d3b477c8634 commit 956cda8d9f222bba3558cf2949a35d3b477c8634 Author: H.J. Lu <hjl.tools@gmail.com> Date: Mon Apr 19 10:45:07 2021 -0700 x86-64: Require BMI2 for strchr-avx2.S [BZ #29611] Since strchr-avx2.S updated by commit 1f745ecc2109890886b161d4791e1406fdfc29b8 Author: noah <goldstein.w.n@gmail.com> Date: Wed Feb 3 00:38:59 2021 -0500 x86-64: Refactor and improve performance of strchr-avx2.S uses sarx: c4 e2 72 f7 c0 sarx %ecx,%eax,%eax for strchr-avx2 family functions, require BMI2 in ifunc-impl-list.c and ifunc-avx2.h. This fixes BZ #29611. (cherry picked from commit 83c5b368226c34a2f0a5287df40fc290b2b34359)
The release/2.28/master branch has been updated by Sunil Pandey <skpgkp2@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=2b05bbfd35f9a7645a74dbeef56bf1000c8ee0b5 commit 2b05bbfd35f9a7645a74dbeef56bf1000c8ee0b5 Author: Sunil K Pandey <skpgkp2@gmail.com> Date: Wed Sep 28 15:53:49 2022 -0700 x86-64: Require BMI2 for avx2 functions [BZ #29611] This patch fixes BZ #29611
Fixed on 2.32/2.31/2.30/2.29/2.28 release branches.
(In reply to Noah Goldstein from comment #12) > (In reply to Aurelien Jarno from comment #11) > > Before trying to fix that in older branches, we should start by fixing > > master. 3 groups of functions are using BMI2: memchr, strchr and strlen. > > * strchr is fixed by this commit: > > > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > > Author: H.J. Lu <hjl.tools@gmail.com> > > Date: Mon Apr 19 10:45:07 2021 -0700 > > > > x86-64: Require BMI2 for strchr-avx2.S > > > > * strlen is fixed by this commit: > > > > commit aaa23c35071537e2dcf5807e956802ed215210aa > > Author: Noah Goldstein <goldstein.w.n@gmail.com> > > Date: Mon Apr 19 19:36:07 2021 -0400 > > > > x86: Optimize strlen-avx2.S > > > > * memchr is not yet fixed in master > memchr should be fine in master. It is not see: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ifunc-impl-list.c;h=a71444eccb3cb7cf59775408b3b2524397aaa2ec;hb=HEAD#l71 There are many more issues on master, so I am reopening the bug. I'll send a patch series fixing the issues. Once this is fixed in master, we can proceed with fixing the stable branches.
(In reply to Aurelien Jarno from comment #28) > (In reply to Noah Goldstein from comment #12) > > (In reply to Aurelien Jarno from comment #11) > > > Before trying to fix that in older branches, we should start by fixing > > > master. 3 groups of functions are using BMI2: memchr, strchr and strlen. > > > * strchr is fixed by this commit: > > > > > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > > > Author: H.J. Lu <hjl.tools@gmail.com> > > > Date: Mon Apr 19 10:45:07 2021 -0700 > > > > > > x86-64: Require BMI2 for strchr-avx2.S > > > > > > * strlen is fixed by this commit: > > > > > > commit aaa23c35071537e2dcf5807e956802ed215210aa > > > Author: Noah Goldstein <goldstein.w.n@gmail.com> > > > Date: Mon Apr 19 19:36:07 2021 -0400 > > > > > > x86: Optimize strlen-avx2.S > > > > > > * memchr is not yet fixed in master > > memchr should be fine in master. > > It is not see: > > https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ > ifunc-impl-list.c;h=a71444eccb3cb7cf59775408b3b2524397aaa2ec;hb=HEAD#l71 > > There are many more issues on master, so I am reopening the bug. I'll send a > patch series fixing the issues. Once this is fixed in master, we can proceed > with fixing the stable branches. That will break the internal test suite of GLIBC but the ifunc-impl-list isn't actually used for selecting which function version is used. In memchr's case it uses ifunc-evex.h: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/memchr.c;h=0c1555dd00f93777f7575f2a959171352b2ec845;hb=HEAD#l27 WHich does have a BMI2 check for avx2: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ifunc-evex.h;h=310cfd269f5e4a4a94e96ab971201ae55a41b0b8;hb=HEAD#l38
(In reply to Noah Goldstein from comment #29) > (In reply to Aurelien Jarno from comment #28) > > (In reply to Noah Goldstein from comment #12) > > > (In reply to Aurelien Jarno from comment #11) > > > > Before trying to fix that in older branches, we should start by fixing > > > > master. 3 groups of functions are using BMI2: memchr, strchr and strlen. > > > > * strchr is fixed by this commit: > > > > > > > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > > > > Author: H.J. Lu <hjl.tools@gmail.com> > > > > Date: Mon Apr 19 10:45:07 2021 -0700 > > > > > > > > x86-64: Require BMI2 for strchr-avx2.S > > > > > > > > * strlen is fixed by this commit: > > > > > > > > commit aaa23c35071537e2dcf5807e956802ed215210aa > > > > Author: Noah Goldstein <goldstein.w.n@gmail.com> > > > > Date: Mon Apr 19 19:36:07 2021 -0400 > > > > > > > > x86: Optimize strlen-avx2.S > > > > > > > > * memchr is not yet fixed in master > > > memchr should be fine in master. > > > > It is not see: > > > > https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ > > ifunc-impl-list.c;h=a71444eccb3cb7cf59775408b3b2524397aaa2ec;hb=HEAD#l71 > > > > There are many more issues on master, so I am reopening the bug. I'll send a > > patch series fixing the issues. Once this is fixed in master, we can proceed > > with fixing the stable branches. > > That will break the internal test suite of GLIBC but the ifunc-impl-list > isn't actually used for selecting which function version is used. > > In memchr's case it uses ifunc-evex.h: > https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ > memchr.c;h=0c1555dd00f93777f7575f2a959171352b2ec845;hb=HEAD#l27 > > WHich does have a BMI2 check for avx2: > https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ > ifunc-evex.h;h=310cfd269f5e4a4a94e96ab971201ae55a41b0b8;hb=HEAD#l38 strcmp-avx2.S also has this bug.
(In reply to Noah Goldstein from comment #12) > (In reply to Aurelien Jarno from comment #11) > > Before trying to fix that in older branches, we should start by fixing > > master. 3 groups of functions are using BMI2: memchr, strchr and strlen. > > * strchr is fixed by this commit: > > > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > > Author: H.J. Lu <hjl.tools@gmail.com> > > Date: Mon Apr 19 10:45:07 2021 -0700 > > > > x86-64: Require BMI2 for strchr-avx2.S > > > > * strlen is fixed by this commit: > > > > commit aaa23c35071537e2dcf5807e956802ed215210aa > > Author: Noah Goldstein <goldstein.w.n@gmail.com> > > Date: Mon Apr 19 19:36:07 2021 -0400 > > > > x86: Optimize strlen-avx2.S > > > > * memchr is not yet fixed in master > memchr should be fine in master. It is not see: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ifunc-impl-list.c;h=a71444eccb3cb7cf59775408b3b2524397aaa2ec;hb=HEAD#l71 There are many more issues on master, so I am reopening the bug. I'll send a patch series fixing the issues. Once this is fixed in master, we can proceed with fixing the stable branches.(In reply to Noah Goldstein from comment #30) > (In reply to Noah Goldstein from comment #29) > > (In reply to Aurelien Jarno from comment #28) > > > (In reply to Noah Goldstein from comment #12) > > > > (In reply to Aurelien Jarno from comment #11) > > > > > Before trying to fix that in older branches, we should start by fixing > > > > > master. 3 groups of functions are using BMI2: memchr, strchr and strlen. > > > > > * strchr is fixed by this commit: > > > > > > > > > > commit 83c5b368226c34a2f0a5287df40fc290b2b34359 > > > > > Author: H.J. Lu <hjl.tools@gmail.com> > > > > > Date: Mon Apr 19 10:45:07 2021 -0700 > > > > > > > > > > x86-64: Require BMI2 for strchr-avx2.S > > > > > > > > > > * strlen is fixed by this commit: > > > > > > > > > > commit aaa23c35071537e2dcf5807e956802ed215210aa > > > > > Author: Noah Goldstein <goldstein.w.n@gmail.com> > > > > > Date: Mon Apr 19 19:36:07 2021 -0400 > > > > > > > > > > x86: Optimize strlen-avx2.S > > > > > > > > > > * memchr is not yet fixed in master > > > > memchr should be fine in master. > > > > > > It is not see: > > > > > > https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ > > > ifunc-impl-list.c;h=a71444eccb3cb7cf59775408b3b2524397aaa2ec;hb=HEAD#l71 > > > > > > There are many more issues on master, so I am reopening the bug. I'll send a > > > patch series fixing the issues. Once this is fixed in master, we can proceed > > > with fixing the stable branches. > > > > That will break the internal test suite of GLIBC but the ifunc-impl-list > > isn't actually used for selecting which function version is used. > > > > In memchr's case it uses ifunc-evex.h: > > https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ > > memchr.c;h=0c1555dd00f93777f7575f2a959171352b2ec845;hb=HEAD#l27 > > > > WHich does have a BMI2 check for avx2: > > https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/multiarch/ > > ifunc-evex.h;h=310cfd269f5e4a4a94e96ab971201ae55a41b0b8;hb=HEAD#l38 > > > strcmp-avx2.S also has this bug. Yes and there are more, I am preparing a patchset.
The master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=10f79d3670b036925da63dc532b122d27ce65ff8 commit 10f79d3670b036925da63dc532b122d27ce65ff8 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 str(n)casecmp implementations The AVX2 str(n)casecmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
The master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=4d64c6445735e9b34e2ac8e369312cbfc2f88e17 commit 4d64c6445735e9b34e2ac8e369312cbfc2f88e17 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 strcmp implementation The AVX2 strcmp implementation uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
The master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=fc7de1d9b99ae1676bc626ddca422d7abee0eb48 commit fc7de1d9b99ae1676bc626ddca422d7abee0eb48 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 strncmp implementation The AVX2 strncmp implementations uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
The master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=f31a5a884ed84bd37032729d4d1eb9d06c9f3c29 commit f31a5a884ed84bd37032729d4d1eb9d06c9f3c29 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 wcs(n)cmp implementations The AVX2 wcs(n)cmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
The master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=e3e7fab7fe5186d18ca2046d99ba321c27db30ad commit e3e7fab7fe5186d18ca2046d99ba321c27db30ad Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations The AVX2 memchr, rawmemchr and wmemchr implementations use the 'bzhi' and 'sarx' instructions, which belongs to the BMI2 CPU feature. Fixes: acfd088a1963 ("x86: Optimize memchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
The master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=3c0c78afabfed4b6fc161c159e628fbf14ff370b commit 3c0c78afabfed4b6fc161c159e628fbf14ff370b Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementation The AVX2 memrchr implementation uses the 'shlxl' instruction, which belongs to the BMI2 CPU feature and uses the 'lzcnt' instruction, which belongs to the LZCNT CPU feature. Fixes: af5306a735eb ("x86: Optimize memrchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
The master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=7e8283170c5d6805b609a040801d819e362a6292 commit 7e8283170c5d6805b609a040801d819e362a6292 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations The AVX2 strrchr and wcsrchr implementation uses the 'blsmsk' instruction which belongs to the BMI1 CPU feature and the 'shrx' instruction, which belongs to the BMI2 CPU feature. Fixes: df7e295d18ff ("x86: Optimize {str|wcs}rchr-avx2") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
The release/2.36/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=46479e5d10ed87825aa277da158d6a687974518b commit 46479e5d10ed87825aa277da158d6a687974518b Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 str(n)casecmp implementations The AVX2 str(n)casecmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 10f79d3670b036925da63dc532b122d27ce65ff8)
The release/2.36/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=7afbd1e56acb721031bffd876f275dcb1af7e530 commit 7afbd1e56acb721031bffd876f275dcb1af7e530 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 strcmp implementation The AVX2 strcmp implementation uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 4d64c6445735e9b34e2ac8e369312cbfc2f88e17)
The release/2.36/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=29c577e0f54fe6e70ceacb3659179781c5569903 commit 29c577e0f54fe6e70ceacb3659179781c5569903 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 strncmp implementation The AVX2 strncmp implementations uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit fc7de1d9b99ae1676bc626ddca422d7abee0eb48)
The release/2.36/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=d8bf4388df679fa5a3ae7889a649e573e3124530 commit d8bf4388df679fa5a3ae7889a649e573e3124530 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 wcs(n)cmp implementations The AVX2 wcs(n)cmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit f31a5a884ed84bd37032729d4d1eb9d06c9f3c29)
The release/2.36/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=d9196d4f3fa9997388655813ddd236426a16dd92 commit d9196d4f3fa9997388655813ddd236426a16dd92 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations The AVX2 memchr, rawmemchr and wmemchr implementations use the 'bzhi' and 'sarx' instructions, which belongs to the BMI2 CPU feature. Fixes: acfd088a1963 ("x86: Optimize memchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit e3e7fab7fe5186d18ca2046d99ba321c27db30ad)
The release/2.36/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=923c3f3c373f499e62160e00831dda576443317b commit 923c3f3c373f499e62160e00831dda576443317b Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementation The AVX2 memrchr implementation uses the 'shlxl' instruction, which belongs to the BMI2 CPU feature and uses the 'lzcnt' instruction, which belongs to the LZCNT CPU feature. Fixes: af5306a735eb ("x86: Optimize memrchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 3c0c78afabfed4b6fc161c159e628fbf14ff370b)
The release/2.36/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=2d8ef784bd6a784496a6fd460de6b6f57c70a501 commit 2d8ef784bd6a784496a6fd460de6b6f57c70a501 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:46:11 2022 +0200 x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations The AVX2 strrchr and wcsrchr implementation uses the 'blsmsk' instruction which belongs to the BMI1 CPU feature and the 'shrx' instruction, which belongs to the BMI2 CPU feature. Fixes: df7e295d18ff ("x86: Optimize {str|wcs}rchr-avx2") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 7e8283170c5d6805b609a040801d819e362a6292)
The release/2.35/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=0161ebf15ba5bd98cf1b47d53c079540cd7871d8 commit 0161ebf15ba5bd98cf1b47d53c079540cd7871d8 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 str(n)casecmp implementations The AVX2 str(n)casecmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 10f79d3670b036925da63dc532b122d27ce65ff8)
The release/2.35/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=6260de8867d9634e5b9b430ce321da6a3256e9a5 commit 6260de8867d9634e5b9b430ce321da6a3256e9a5 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 strcmp implementation The AVX2 strcmp implementation uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 4d64c6445735e9b34e2ac8e369312cbfc2f88e17)
The release/2.35/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=7e1326c43a7ab2468946bd711983907d79ceca3b commit 7e1326c43a7ab2468946bd711983907d79ceca3b Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 strncmp implementation The AVX2 strncmp implementations uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit fc7de1d9b99ae1676bc626ddca422d7abee0eb48)
The release/2.35/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=1523fbedff44273c15cb60e269872ff761f574c7 commit 1523fbedff44273c15cb60e269872ff761f574c7 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 wcs(n)cmp implementations The AVX2 wcs(n)cmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit f31a5a884ed84bd37032729d4d1eb9d06c9f3c29)
The release/2.35/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=c85a45acacd6f2ecaa66128364e5621e0cdcab1b commit c85a45acacd6f2ecaa66128364e5621e0cdcab1b Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations The AVX2 memchr, rawmemchr and wmemchr implementations use the 'bzhi' and 'sarx' instructions, which belongs to the BMI2 CPU feature. Fixes: acfd088a1963 ("x86: Optimize memchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit e3e7fab7fe5186d18ca2046d99ba321c27db30ad)
The release/2.35/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=02aa1f4a5b6955f2cb384daa4e520d9c8078a078 commit 02aa1f4a5b6955f2cb384daa4e520d9c8078a078 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementation The AVX2 memrchr implementation uses the 'shlxl' instruction, which belongs to the BMI2 CPU feature and uses the 'lzcnt' instruction, which belongs to the LZCNT CPU feature. Fixes: af5306a735eb ("x86: Optimize memrchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 3c0c78afabfed4b6fc161c159e628fbf14ff370b)
The release/2.35/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=20152a849b34abe83c702b27b7276c96b191b644 commit 20152a849b34abe83c702b27b7276c96b191b644 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations The AVX2 strrchr and wcsrchr implementation uses the 'blsmsk' instruction which belongs to the BMI1 CPU feature and the 'shrx' instruction, which belongs to the BMI2 CPU feature. Fixes: df7e295d18ff ("x86: Optimize {str|wcs}rchr-avx2") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 7e8283170c5d6805b609a040801d819e362a6292)
The release/2.34/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=414fc856ff4e011e62b88a21d30294637a152dc7 commit 414fc856ff4e011e62b88a21d30294637a152dc7 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 str(n)casecmp implementations The AVX2 str(n)casecmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 10f79d3670b036925da63dc532b122d27ce65ff8)
The release/2.34/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=e1561d8cf005a23bcaf514802854b493829a25b1 commit e1561d8cf005a23bcaf514802854b493829a25b1 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 strcmp implementation The AVX2 strcmp implementation uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 4d64c6445735e9b34e2ac8e369312cbfc2f88e17)
The release/2.34/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=b9cbb8dd48b545f3b36b5d411481dc0bd118ee94 commit b9cbb8dd48b545f3b36b5d411481dc0bd118ee94 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 strncmp implementation The AVX2 strncmp implementations uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit fc7de1d9b99ae1676bc626ddca422d7abee0eb48)
The release/2.34/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=67e863742d98c990b3d3b814b80042c0fa0d50a5 commit 67e863742d98c990b3d3b814b80042c0fa0d50a5 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 wcs(n)cmp implementations The AVX2 wcs(n)cmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit f31a5a884ed84bd37032729d4d1eb9d06c9f3c29)
The release/2.34/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=94b9c1b6409e34f3f0b2339f77d7ee78087422eb commit 94b9c1b6409e34f3f0b2339f77d7ee78087422eb Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations The AVX2 memchr, rawmemchr and wmemchr implementations use the 'bzhi' and 'sarx' instructions, which belongs to the BMI2 CPU feature. Fixes: acfd088a1963 ("x86: Optimize memchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit e3e7fab7fe5186d18ca2046d99ba321c27db30ad)
The release/2.34/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=36d6b9be3d7008a78e1f6e2e2db1947b76b206d8 commit 36d6b9be3d7008a78e1f6e2e2db1947b76b206d8 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementation The AVX2 memrchr implementation uses the 'shlxl' instruction, which belongs to the BMI2 CPU feature and uses the 'lzcnt' instruction, which belongs to the LZCNT CPU feature. Fixes: af5306a735eb ("x86: Optimize memrchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 3c0c78afabfed4b6fc161c159e628fbf14ff370b)
The release/2.34/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=e570b865b53f33453d97160791a7d97e38bcc6e8 commit e570b865b53f33453d97160791a7d97e38bcc6e8 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations The AVX2 strrchr and wcsrchr implementation uses the 'blsmsk' instruction which belongs to the BMI1 CPU feature and the 'shrx' instruction, which belongs to the BMI2 CPU feature. Fixes: df7e295d18ff ("x86: Optimize {str|wcs}rchr-avx2") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 7e8283170c5d6805b609a040801d819e362a6292)
The release/2.33/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=26d4359b448a39054e627ad072a7480dd24f0313 commit 26d4359b448a39054e627ad072a7480dd24f0313 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 strcmp implementation The AVX2 strcmp implementation uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 4d64c6445735e9b34e2ac8e369312cbfc2f88e17)
The release/2.33/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=050d652900d5f88447af335b20b621344f16e192 commit 050d652900d5f88447af335b20b621344f16e192 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 strncmp implementation The AVX2 strncmp implementations uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit fc7de1d9b99ae1676bc626ddca422d7abee0eb48)
The release/2.33/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=35f655c89050cee82dc2d20a5a9a3d53f52a9eb8 commit 35f655c89050cee82dc2d20a5a9a3d53f52a9eb8 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 wcs(n)cmp implementations The AVX2 wcs(n)cmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit f31a5a884ed84bd37032729d4d1eb9d06c9f3c29)
The release/2.33/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=068c8d5aa994d868bb9307dc0d4c8e3f060b2cf3 commit 068c8d5aa994d868bb9307dc0d4c8e3f060b2cf3 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations The AVX2 memchr, rawmemchr and wmemchr implementations use the 'bzhi' and 'sarx' instructions, which belongs to the BMI2 CPU feature. Fixes: acfd088a1963 ("x86: Optimize memchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit e3e7fab7fe5186d18ca2046d99ba321c27db30ad)
The release/2.33/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=38e321f4ac70b6aecb35a8af7d1a2fbe366ab482 commit 38e321f4ac70b6aecb35a8af7d1a2fbe366ab482 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementation The AVX2 memrchr implementation uses the 'shlxl' instruction, which belongs to the BMI2 CPU feature and uses the 'lzcnt' instruction, which belongs to the LZCNT CPU feature. Fixes: af5306a735eb ("x86: Optimize memrchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 3c0c78afabfed4b6fc161c159e628fbf14ff370b)
The release/2.33/master branch has been updated by Aurelien Jarno <aurel32@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=67e310afb91fa27295f7cf5140176efd6ba5dd51 commit 67e310afb91fa27295f7cf5140176efd6ba5dd51 Author: Aurelien Jarno <aurelien@aurel32.net> Date: Mon Oct 3 23:16:46 2022 +0200 x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations The AVX2 strrchr and wcsrchr implementation uses the 'blsmsk' instruction which belongs to the BMI1 CPU feature and the 'shrx' instruction, which belongs to the BMI2 CPU feature. Fixes: df7e295d18ff ("x86: Optimize {str|wcs}rchr-avx2") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com> (cherry picked from commit 7e8283170c5d6805b609a040801d819e362a6292)
This has been fixed in master, and backported to the 2.33, 2.34, 2.35 and 2.36 branches. Closing.