Created attachment 13068 [details] The minimal example During research of ARM Cortex-M3-based processor for our master thesis, we found a bug (using a tool that generates random-but-correct sequences of assembly instructions). Minimal example: .syntax unified .cpu cortex-m3 .thumb .align 2 .type f1, %function .thumb_func f1: it eq isbeq The example compiles successfully (arm-none-eabi-as -o test.o test.s -mcpu=cortex-m3) without any message emitted, but it should not. The ARMv7-M Architecture Reference Manual states that ISB instruction inside an IT block is unpredictable (see Section A7.7.38 IT, page A7-236). The ARMv7-M Architecture Reference Manual can be downloaded from: https://static.docs.arm.com/ddi0403/ed/DDI0403E_d_armv7m_arm.pdf Expected behavior: assembler should emit a warning or error message.
By accident, I did a mistake in the reference to the ARMv7-M Architecture Reference Manual. The note that "ISB instruction inside an IT block is unpredictable" is in Section A7.7.37 ISB, page A7-235.