Bug 27099 - [ARM] ISB instruction inside an IT block
Summary: [ARM] ISB instruction inside an IT block
Status: UNCONFIRMED
Alias: None
Product: binutils
Classification: Unclassified
Component: gas (show other bugs)
Version: 2.35
: P2 minor
Target Milestone: ---
Assignee: Not yet assigned to anyone
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Depends on:
Blocks:
 
Reported: 2020-12-20 14:05 UTC by Wojciech Kordalski
Modified: 2022-06-22 06:29 UTC (History)
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The minimal example (94 bytes, text/plain)
2020-12-20 14:05 UTC, Wojciech Kordalski
Details

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Description Wojciech Kordalski 2020-12-20 14:05:37 UTC
Created attachment 13068 [details]
The minimal example

During research of ARM Cortex-M3-based processor for our master thesis, we found a bug (using a tool that generates random-but-correct sequences of assembly instructions).

Minimal example:

    .syntax unified
    .cpu cortex-m3
    .thumb
    
    .align 2
    .type f1, %function
    .thumb_func
    f1:
        it eq
        isbeq

The example compiles successfully (arm-none-eabi-as -o test.o test.s -mcpu=cortex-m3) without any message emitted, but it should not.

The ARMv7-M Architecture Reference Manual states that ISB instruction inside an IT block is unpredictable (see Section A7.7.38 IT, page A7-236).

The ARMv7-M Architecture Reference Manual can be downloaded from: https://static.docs.arm.com/ddi0403/ed/DDI0403E_d_armv7m_arm.pdf

Expected behavior: assembler should emit a warning or error message.
Comment 1 Wojciech Kordalski 2020-12-20 22:02:39 UTC
By accident, I did a mistake in the reference to the ARMv7-M Architecture Reference Manual.

The note that "ISB instruction inside an IT block is unpredictable" is in Section A7.7.37 ISB, page A7-235.