Bug 24633 - objdump accepts invalid encoding for vextractf32x8 (possibly others).
Summary: objdump accepts invalid encoding for vextractf32x8 (possibly others).
Status: RESOLVED FIXED
Alias: None
Product: binutils
Classification: Unclassified
Component: binutils (show other bugs)
Version: 2.32
: P2 normal
Target Milestone: 2.33
Assignee: H.J. Lu
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-06-03 22:47 UTC by Hendrik Greving
Modified: 2019-06-12 20:01 UTC (History)
1 user (show)

See Also:
Host:
Target:
Build:
Last reconfirmed: 2019-06-04 00:00:00


Attachments
Try this (1.00 KB, patch)
2019-06-04 21:19 UTC, H.J. Lu
Details | Diff

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Description Hendrik Greving 2019-06-03 22:47:09 UTC
objdump does not check the vector length of vextractf32x8

main.s:

.byte 0x62
.byte 0xf3
.byte 0x7d
.byte 0x28
.byte 0x1b
.byte 0xc8
.byte 0x25

as-new --64 main.s
objdump -d a.out
[..]
59:   62 f3 7d 28 1b c8 25    vextractf32x8 $0x25,%ymm1,%xmm0

Intel's manual only lists the EVEX.LL' form (zmm source and ymm destination)

llvm-mc for example is correct:

echo '0x62 0xf3 0x7d 0x28 0x1b 0xc8 0x25' | llvm-mc-7 --disassemble -triple=x86_64
        .text
<stdin>:1:1: warning: invalid instruction encoding
0x62 0xf3 0x7d 0x28 0x1b 0xc8 0x25
^
<stdin>:1:26: warning: invalid instruction encoding
0x62 0xf3 0x7d 0x28 0x1b 0xc8 0x25
                         ^
<stdin>:1:31: warning: invalid instruction encoding
0x62 0xf3 0x7d 0x28 0x1b 0xc8 0x25
                              ^
and

echo '0x62 0xf3 0x7d 0x48 0x1b 0xc8 0x25' | llvm-mc-7 --disassemble -triple=x86_64
        .text
        vextractf32x8   $37, %zmm1, %ymm0
Comment 1 Hendrik Greving 2019-06-03 22:48:21 UTC
gas seems ok (does not accept vextractf32x8 $0x25,%ymm1,%xmm0)
Comment 2 H.J. Lu 2019-06-04 21:19:26 UTC
Created attachment 11813 [details]
Try this
Comment 3 Sourceware Commits 2019-06-05 17:28:42 UTC
The master branch has been updated by H.J. Lu <hjl@sourceware.org>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=12efd68d159444ad8dfe24e49965a228ba980b86

commit 12efd68d159444ad8dfe24e49965a228ba980b86
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jun 5 10:27:08 2019 -0700

    i386: Check vector length for EVEX vextractfXX and vinsertfXX
    
    Since not all vector lengths are supported by EVEX vextractfXX and
    vinsertfXX, decode them only with supported vector lengths.
    
    gas/
    
    	PR binutils/24633
    	* testsuite/gas/i386/disassem.s: Add tests for invalid vector
    	lengths for EVEX vextractfXX and vinsertfXX.
    	* testsuite/gas/i386/x86-64-disassem.s: Likewise.
    	* testsuite/gas/i386/disassem.d: Updated.
    	* testsuite/gas/i386/x86-64-disassem.d: Likewise.
    
    opcodes/
    
    	PR binutils/24633
    	* i386-dis-evex.h (evex_table): Update EVEX_W_0F3A18_P_2,
    	EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2 and EVEX_W_0F3A1B_P_2.
    	(evex_len_table): EVEX_LEN_0F3A18_P_2_W_0,
    	EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
    	EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
    	EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
    	EVEX_LEN_0F3A1B_P_2_W_1.
    	* i386-dis.c (EVEX_LEN_0F3A18_P_2_W_0): New enum.
    	(EVEX_LEN_0F3A18_P_2_W_1): Likewise.
    	(EVEX_LEN_0F3A19_P_2_W_0): Likewise.
    	(EVEX_LEN_0F3A19_P_2_W_1): Likewise.
    	(EVEX_LEN_0F3A1A_P_2_W_0): Likewise.
    	(EVEX_LEN_0F3A1A_P_2_W_1): Likewise.
    	(EVEX_LEN_0F3A1B_P_2_W_0): Likewise.
    	(EVEX_LEN_0F3A1B_P_2_W_1): Likewise.
Comment 4 H.J. Lu 2019-06-05 17:30:50 UTC
Fixed for 2.33.
Comment 5 Hendrik Greving 2019-06-05 17:33:10 UTC
Thanks.
Comment 6 H.J. Lu 2019-06-12 20:01:25 UTC
Fixed for 2.33