[hjl@gnu-cfl-1 testsuite]$ cat x.s vdpbf16ps 8(%rax){1to8}, %zmm2, %zmm2 vcvtne2ps2bf16 8(%rax){1to8}, %zmm2, %zmm2 [hjl@gnu-cfl-1 testsuite]$ ../as-new -o x.o x.s [hjl@gnu-cfl-1 testsuite]$ ../../binutils/objdump -dw x.o x.o: file format elf64-x86-64 Disassembly of section .text: 0000000000000000 <.text>: 0: 62 f2 6e 58 52 50 02 vdpbf16ps 0x8(%rax){1to16},%zmm2,%zmm2 7: 62 f2 6f 58 72 50 02 vcvtne2ps2bf16 0x8(%rax){1to16},%zmm2,%zmm2 [hjl@gnu-cfl-1 testsuite]$
The master branch has been updated by H.J. Lu <hjl@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=a2f4b66c9eb5210f8ef6038d7194af1e5f314f97 commit a2f4b66c9eb5210f8ef6038d7194af1e5f314f97 Author: H.J. Lu <hjl.tools@gmail.com> Date: Tue May 28 10:05:28 2019 -0700 x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVL For AVX512 instructions with Disp8ShiftVL and Broadcast, we may need to add CheckRegSize to check if broadcast matches the destination register size. gas/ PR gas/24625 * testsuite/gas/i386/inval-avx512f.s: Add tests for AVX512_BF16 instructions with invalid broadcast. * testsuite/gas/i386/x86-64-inval-avx512f.s: Likewise. * testsuite/gas/i386/inval-avx512f.l: Updated. * testsuite/gas/i386/x86-64-inval-avx512f.l: Likewise. opcodes/ PR gas/24625 * i386-opc.tbl: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVL. * i386-tbl.h: Regenerated.
Fixed for 2.33