WHilst the ISA of AVR ATtiny416 / 417 / 816 / 817 would fit avrxmega2, these sevices feature the flash being accessible via the SRAM address range and instructions. This means that .rodata need not to be part of .data which is the case for all other AVR devices (except avrtiny). Using SRAM addresses for .rodata requires that such SRAM addresses are offset by 0x8000 compared to the flash addresses as accessible by LPM, for example like so: __RODATA_PM_OFFSET__ = DEFINED(__RODATA_PM_OFFSET__) ? __RODATA_PM_OFFSET__ : 0x8000; .text : { ... } > text .rodata ADDR(.text) + SIZEOF (.text) + __RODATA_PM_OFFSET__ : { *(.rodata) *(.rodata*) *(.gnu.linkonce.r*) } AT> text .data : { ... Consequently, we want a new emulation to support that feature in an optimal way.
Created attachment 10041 [details] binutils-avrxmega3.diff: Proposed patch ld/ Upgrade the currently unused emulation avrxmega3 to one which supports avrxmega2 devices with flash memory visible in the SRAM address range. PR21472 * scripttempl/avr_rodata.sc: New file. * emulparams/avrxmega3.sh (SCRIPT_NAME): Use avr_rodata. (RODATA_PM_OFFSET): Set to 0x8000. gas/ PR21472 * config/tc-avr.c (mcu_types): Add entries for: attiny416, attiny417, attiny816, attiny817.
The master branch has been updated by Nick Clifton <nickc@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f4203b2b8830e66e5229b7f9d30cd29b088566b5 commit f4203b2b8830e66e5229b7f9d30cd29b088566b5 Author: eorg-Johann Lay <avr@gjlay.de> Date: Fri May 19 15:06:33 2017 +0100 Update avrxmega3 linker emulation to support avrxmega2 devices with flash memory visible in the SRAM address range. PR ld/21472 ld * emulparams/avrxmega3.sh (RODATA_PM_OFFSET): Set to 0x8000. * scripttempl/avr.sc (__RODATA_PM_OFFSET__) [RODATA_PM_OFFSET]: Use RODATA_PM_OFFSET as default if not already defined. (.data) [!RODATA_PM_OFFSET]: Don't include .rodata and friends. (.rodata) [RODATA_PM_OFFSET]: Put at an offset of __RODATA_PM_OFFSET__. gas * config/tc-avr.c (mcu_types): Add entries for: attiny416, attiny417, attiny816, attiny817.
Created attachment 10237 [details] binutils-avrxmega3-pr21472-doc.diff: Round-up of documentation. gas/ PR ld/21472 * config/tc-avr.c (mcu_types): Add entries for: attiny212, attiny214, attiny412, attiny414, attiny814, attiny1614, attiny1616, attiny1617, attiny3214, attiny3216, attiny3217. (md_show_usage): Adjust doc for "avrxmega3". * doc/c-avr.texi (AVR options) [-mmcu=]: Adjust doc for avrxmega3. Add MCUs: attiny212, attiny214, attiny412, attiny414, attiny416, attiny417, attiny814, attiny816, attiny817, attiny1614, attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
The master branch has been updated by Nick Clifton <nickc@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f27dadca0ad18d5a0ba032c3d3f6a60ea55d887b commit f27dadca0ad18d5a0ba032c3d3f6a60ea55d887b Author: Georg-Johann Lay <avr@gjlay.de> Date: Mon Jul 17 10:23:10 2017 +0100 Update assembler documentation on some AVR cores. PR 21472 * config/tc-avr.c (mcu_types): Add entries for: attiny212, attiny214, attiny412, attiny414, attiny814, attiny1614, attiny1616, attiny1617, attiny3214, attiny3216, attiny3217. (md_show_usage): Adjust doc for "avrxmega3". * doc/c-avr.texi (AVR options) [-mmcu=]: Adjust doc for avrxmega3. Add MCUs: attiny212, attiny214, attiny412, attiny414, attiny416, attiny417, attiny814, attiny816, attiny817, attiny1614, attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
Added in 2.29
open for > 12 years now and has been suspended. https://komiya-dental.com/ A comined GCC + GAS approach would be feasible, and this PR is the GAS part: GAS implements a __gcc_isr pseudo-instruction which scans the code and emits parts of ISR prologue and epilogue. __gcc_isr 1: GAS will replace it by an ISR prologue chunk (at most 6 insns). __gcc_isr 2: GAS will replace it by an ISR epilogue chunk (at most 5 insns). http://www.iu-bloomington.com/ __gcc_isr 0, Rx: Scan the code since the last prologue chunk and replace all encountered prologue and epilogue chunks by appropriate code. Rx is general purpose register. https://www.webb-dev.co.uk/ During parse (md_assemble), prologue and epilogue chunks are represented as rs_machine_dependent fragments. If "__gcc_isr 0, Rx" is seen, all rs_machine_dependent fragments in the current chain are transformed into ordinary rs_fill code fragments of then known fixed size. After parse (md_pre_output_hook) a sanity check is performed which reports any dangling chunks. https://waytowhatsnext.com/ __gcc_isr is only available with the new command line option open for > 12 years now and has been suspended. A comined GCC + GAS approach would be feasible, and this PR is the GAS part: GAS implements a __gcc_isr pseudo-instruction which scans the code and emits parts of ISR prologue and epilogue. http://www.acpirateradio.co.uk/ __gcc_isr 1: GAS will replace it by an ISR prologue chunk (at most 6 insns). __gcc_isr 2: GAS will replace it by an ISR epilogue chunk (at most 5 insns). __gcc_isr 0, Rx: Scan the code since the last prologue chunk and replace all encountered prologue and epilogue chunks by appropriate code. Rx is general purpose register. http://www.logoarts.co.uk/ During parse (md_assemble), prologue and epilogue chunks are represented as rs_machine_dependent fragments. If "__gcc_isr 0, Rx" is seen, all rs_machine_dependent fragments in the current chain are transformed into ordinary rs_fill code fragments of then known fixed size. http://www.slipstone.co.uk/ After parse (md_pre_output_hook) a sanity check is performed which reports any dangling chunks. __gcc_isr is only available with the new command line option open for > 12 years now and has been suspended. http://embermanchester.uk/ A comined GCC + GAS approach would be feasible, and this PR is the GAS part: GAS implements a http://connstr.net/ __gcc_isr pseudo-instruction which scans the code and emits parts of ISR prologue and epilogue. __gcc_isr 1: GAS will http://joerg.li/ replace it by an ISR prologue chunk (at most 6 insns). __gcc_isr 2: GAS will replace it by an ISR epilogue chunk (at most 5 insns). http://www.jopspeech.com/ __gcc_isr 0, Rx: Scan the code since the last prologue chunk and replace all encountered prologue and epilogue chunks by appropriate code. Rx is general purpose register. http://www.wearelondonmade.com/ During parse (md_assemble), prologue and epilogue chunks are represented as rs_machine_dependent fragments. If "__gcc_isr 0, Rx" is seen, all rs_machine http://www.compilatori.com/ _dependent fragments in the current chain are transformed into ordinary rs_fill code fragments of then known fixed size. After parse (md_pre_output_hook) a sanity check is performed which reports any dangling chunks. http://www-look-4.com/ __gcc_isr is only available with the new command line option
Has this bug solved already? https://www.congdonandcoleman.com/