Following syntax is wrong as per Aarch64 specification for vector by element operations, but is accepted without any warnings/errors. fmul v16.4s, v0.4s, v8.4s[0] fmla v20.4s, v0.4s, v8.2s[1] fmla v0.2d, v1.2d, v2.2d[0] Correct syntax should be. fmul v16.4s, v0.4s, v8.s[0] fmla v20.4s, v0.4s, v8.s[1] fmla v0.2d, v1.2d, v2.d[0] References: https://github.com/xianyi/OpenBLAS/commit/278511ad2d1727a7ed74c38e3664b5e51b04adc6 http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802b/FMLA_advsimd_elt_vector.html Thanks, Ashwin
(In reply to Ashwin Sekhar T K from comment #0) > Following syntax is wrong as per Aarch64 specification for vector by element > operations, but is accepted without any warnings/errors. > > fmul v16.4s, v0.4s, v8.4s[0] > fmla v20.4s, v0.4s, v8.2s[1] > fmla v0.2d, v1.2d, v2.2d[0] > > Correct syntax should be. > > fmul v16.4s, v0.4s, v8.s[0] > fmla v20.4s, v0.4s, v8.s[1] > fmla v0.2d, v1.2d, v2.d[0] > > > References: > https://github.com/xianyi/OpenBLAS/commit/ > 278511ad2d1727a7ed74c38e3664b5e51b04adc6 > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802b/ > FMLA_advsimd_elt_vector.html > > Thanks, > Ashwin IIRC, aarch64 gcc is using both forms, the assembler is giving some tolerance on this. Will confirm whether this is a mistake.