As per mailing list link : https://sourceware.org/ml/binutils/2015-09/msg00095.html /*testcase*/ /*test.s*/ mov.b #0xff, [r0] mov.b #0xff, 0[r0] mov.b #0xff, 1[r0] mov.b #0xff, 2[r0] mov.b #0xff, 3[r0] mov.b #0xff, 4[r0] mov.b #0xff, 5[r0] $rx-elf-as test.s -o test.o -aln=test.lst $rx-elf-objdump -d test.o > test.o.dis $cat test.lst 1 0000 3C 00 FF mov.b #0xff, [r0] --> Should be "F8 04 FF mov.b #0xff, [r0]" 2 0003 3C 00 FF mov.b #0xff, 0[r0] 3 0006 3C 01 FF mov.b #0xff, 1[r0] 4 0009 3C 02 FF mov.b #0xff, 2[r0] 5 000c 3C 03 FF mov.b #0xff, 3[r0] 6 000f 3C 04 FF mov.b #0xff, 4[r0] 7 0012 3C 05 FF mov.b #0xff, 5[r0] The above testcase generates expected opcode with attched patch "mov_imm_1388.patch". $cat test.o.dis test.o: file format elf32-rx-le Disassembly of section P: 00000000 <P>: 0: 3c 00 ff mov.b #255, [r0] --> Should be "F8 04 FF mov.b #255, [r0]" 3: 3c 00 ff mov.b #255, [r0] 6: 3c 01 ff mov.b #255, 1[r0] 9: 3c 02 ff mov.b #255, 2[r0] c: 3c 03 ff mov.b #255, 3[r0] f: 3c 04 ff mov.b #255, 4[r0] 12: 3c 05 ff mov.b #255, 5[r0]
Created attachment 8954 [details] Fix for r0 register.
The above reported testcase work fine with attched patch for r0 register. https://sourceware.org/bugzilla/attachment.cgi?id=8954
Hi Vinay, > The above reported testcase work fine with attched patch for r0 register. > https://sourceware.org/bugzilla/attachment.cgi?id=8954 You need to make the patch work with all registers though, not just the r0 register. When you do, please also make sure to run the gas testsuite on the resulting patched assembler. I found that just adding F($8, 9, 3) to your new patterns actually resulted in some new failures ... Cheers Nick PS. If you prefer I can have a go at fixing the bug, but I thought that you might find it useful to experiment with fixing it yourself.
Hi Nick, Thanks for your feedback I will work on this bug. Regards, Vinay
Updated patch is posted at below link: https://sourceware.org/ml/binutils/2016-02/msg00153.html
Patch checked in.