Created attachment 6830 [details] patch that implement 16 bits opcode disassembly tic6x libopcode is not able to disassemble 16 bits opcodes a.k.a fetch-packet header based opcode as implemented by TMS320C64x+ DSP CPU
Created attachment 6911 [details] Proposed inplementation plus gas testsuite test-cases
CVSROOT: /cvs/src Module name: src Changes by: nickc@sourceware.org 2013-03-27 11:43:37 Modified files: opcodes : ChangeLog tic6x-dis.c gas : ChangeLog gas/config : tc-tic6x.c gas/testsuite : ChangeLog include/opcode : ChangeLog tic6x-insn-formats.h tic6x-opcode-table.h tic6x.h Added files: gas/testsuite/gas/tic6x: insns16-d-unit.d insns16-d-unit.s insns16-ddec.d insns16-ddec.s insns16-dinc.d insns16-dinc.s insns16-dind.d insns16-dind.s insns16-doff4.d insns16-doff4.s insns16-l-unit.d insns16-l-unit.s insns16-lsd-unit.d insns16-lsd-unit.s insns16-m-unit.d insns16-m-unit.s insns16-s-unit-pcrel.d insns16-s-unit-pcrel.s insns16-s-unit.d insns16-s-unit.s Log message: PR binutils/15068 * tic6x-dis.c: Add support for displaying 16-bit insns. * tic6xc-insn-formats.h (FLD): Add use of bitfield array. Add 16-bit opcodes. * tic6xc-opcode-table.h: Add 16-bit insns. * tic6x.h: Add support for 16-bit insns. * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array. * gas/tic6x/insns16-d-unit.s: New test. * gas/tic6x/insns16-d-unit.d: Expected disassembly. * gas/tic6x/insns16-ddec.s: New test. * gas/tic6x/insns16-ddec.d: Expected disassembly. * gas/tic6x/insns16-dinc.s: New test. * gas/tic6x/insns16-dinc.d: Expected disassembly. * gas/tic6x/insns16-dind.s: New test. * gas/tic6x/insns16-dind.d: Expected disassembly. * gas/tic6x/insns16-doff4.s: New test. * gas/tic6x/insns16-doff4.d: Expected disassembly. * gas/tic6x/insns16-l-unit.s: New test. * gas/tic6x/insns16-l-unit.d: Expected disassembly. * gas/tic6x/insns16-lsd-unit.s: New test. * gas/tic6x/insns16-lsd-unit.d: Expected disassembly. * gas/tic6x/insns16-m-unit.s: New test. * gas/tic6x/insns16-m-unit.d: Expected disassembly. * gas/tic6x/insns16-s-unit-pcrel.s: New test. * gas/tic6x/insns16-s-unit-pcrel.d: Expected disassembly. * gas/tic6x/insns16-s-unit: New test. * gas/tic6x/insns16-s-unit.d: Expected disassembly. Patches: http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1950&r2=1.1951 http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/tic6x-dis.c.diff?cvsroot=src&r1=1.4&r2=1.5 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4957&r2=1.4958 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-tic6x.c.diff?cvsroot=src&r1=1.19&r2=1.20 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.2209&r2=1.2210 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-d-unit.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-d-unit.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-ddec.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-ddec.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-dinc.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-dinc.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-dind.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-dind.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-doff4.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-doff4.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-l-unit.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-l-unit.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-lsd-unit.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-lsd-unit.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-m-unit.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-m-unit.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-s-unit-pcrel.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-s-unit-pcrel.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-s-unit.d.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-s-unit.s.diff?cvsroot=src&r1=NONE&r2=1.1 http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.490&r2=1.491 http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/tic6x-insn-formats.h.diff?cvsroot=src&r1=1.2&r2=1.3 http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/tic6x-opcode-table.h.diff?cvsroot=src&r1=1.5&r2=1.6 http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/tic6x.h.diff?cvsroot=src&r1=1.3&r2=1.4
Hi Alexis, Thanks for the bug report and patch. I have checked the patch in, along with some suitable changelog entries. Cheers Nick
Hi Nick, Thanks ! I didn't expect this patch to be checked in so promptly and had another revision cooking. Do you want me to re-open this bug or do you prefer that I file new bugs for the remaining issues after I'm able to rebase my tree ? Cheers, Alexis.
Hi Alexis, > Thanks ! I didn't expect this patch to be checked in so promptly and had > another revision cooking. > > Do you want me to re-open this bug or do you prefer that I file new bugs for > the remaining issues after I'm able to rebase my tree ? Hmm, if the remaining issues are for similar, but logically different problems from the original then please file a new bug report(s), but if they are for the same problem then please reopen the current report. Cheers Nick
Created attachment 6953 [details] fixes two bugs with 16 bits instruction disassembly follow-up patch that fixes two bugs with 16 bits instruction disassembly
CVSROOT: /cvs/src Module name: src Changes by: nickc@sourceware.org 2013-03-28 09:25:11 Modified files: include/opcode : ChangeLog tic6x-opcode-table.h gas/testsuite : ChangeLog gas/testsuite/gas/tic6x: insns16-lsd-unit.d insns16-lsd-unit.s Log message: PR binutils/15068 * tic6x-opcode-table.h: Fix patterns for add, ldnw and xor. * gas/tic6x/insns16-lsd-unit.s: Correct bit patterns for mvk, add and xor. * gas/tic6x/insns16-lsd-unit.d: Update expected output. Patches: http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.491&r2=1.492 http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/tic6x-opcode-table.h.diff?cvsroot=src&r1=1.6&r2=1.7 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.2211&r2=1.2212 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-lsd-unit.d.diff?cvsroot=src&r1=1.1&r2=1.2 http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/tic6x/insns16-lsd-unit.s.diff?cvsroot=src&r1=1.1&r2=1.2
Patch applied.