Hitachi djprobe mechanism

[Mathieu Desnoyers]

* Richard J Moore (richardj_moore@uk.ibm.com) wrote:
> 
> Intel erratum 54 - Unsynchronized Cross-modifying code - refers to the
> practice of modifying code on one processor where another has prefetched
> the unmodified version of the code. Intel states that unpredictable general
> protection faults may result if a synchronizing instruction (iret, int,
> int3, cpuid, etc ) is not executed on the second processor before it
> executes the pre-fetched out-of-date copy of the instruction.
> 

Well, using an IPI that would make all other CPUs loop waiting for the specific
memory address to have been written with the expected new instructions seems to
fit it this description too : they will all have to return from interrupt before
going back to the modified code path.


[...]
> So, is cmpxchg reliable? One has to guarantee more than mere atomicity.
> 

Thanks for pointing that out : it gives the technical explanation of something I
only suspected.


Mathieu

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