[PATCH v2 0/1] riscv: add vectorized memset, memcpy and memmove
Pincheng Wang
pincheng.plct@isrc.iscas.ac.cn
Sat Jan 3 15:21:43 GMT 2026
Hi all,
Happy new year!
Just a gentle ping on this patch series. Please let me know if there are
any remaining concerns that I can help address. Happy to update the
series if needed. :)
Thanks,
Pincheng Wang
On 2025/12/26 0:08, Pincheng Wang wrote:
> This v2 patch adds RISC-V Vector (RVV) optimized implementations for
> memset, memcpy and memmove.
>
> Changes since v1:
> - Switch the conditional compilation macro from __riscv_v to __riscv_vector.
> - Replaced '.option arch,+v' with '.option arch,+zve32x'.
> - Removed an unnecessary unconditional jump instruction in memmove-asm.S
> - In memcpy and memmove, when __riscv_misaligned_fast is not defined,
> the destination address is now aligned to SZREG to improve performance
> on systems with slow misaligned accesses.
>
> These implementations use the RVV extension with e8 element size and m8
> LMUL, and are conditionally compiled only when __riscv_vector is
> defined, ensuring compatibility with non-vector RISC-V systems.
>
> Benchmark results on Spacemit X60 (Muse-pi) and Canaan K230 show significant
> improvements.
>
> memcpy: Up to 4.84x on Muse-pi and 4.66x on K230.
> memset: Up to 4.31x on Muse-pi and 3.14x on K230.
> memmove: Up to 2.87x on Muse-pi and 1.48x on K230.
>
> With newly added alignment handling, these improvements are consistent
> across both aligned and misaligned memory acesses.
>
> In the v1 review thread, Kito suggested removing the 'sub' instruction in
> the RVV memcpy loop and relying solely on the end-pointer-based loop
> condition. After careful consideration, I would like to clarify that in
> this specific context, the 'sub' cannot actually be eliminated since the
> RVV loop still requires the exact number of remaining bytes to be
> provided to vsetvli. Therefore, I have retained the orignial loop
> structure.
>
> Comments and suggestions are greatly appreciated, Thank you for your
> time and review!
>
> Thanks,
> Pincheng Wang
>
> Pincheng Wang (1):
> riscv: add vectorized memset, memcpy and memmove
>
> newlib/libc/machine/riscv/memcpy-asm.S | 54 +++++++++++++-
> newlib/libc/machine/riscv/memcpy.c | 2 +-
> newlib/libc/machine/riscv/memmove-asm.S | 95 ++++++++++++++++++++++++-
> newlib/libc/machine/riscv/memmove.c | 2 +-
> newlib/libc/machine/riscv/memset.S | 21 +++++-
> 5 files changed, 169 insertions(+), 5 deletions(-)
>
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