Fix libgloss and Newlib RISC-V builds for rv64e
Kito Cheng
kito.cheng@gmail.com
Mon Apr 21 11:56:58 GMT 2025
This patch set is LGTM , thanks :)
Eric Salem <ericsalem@gmail.com> 於 2025年4月21日 週一 05:40 寫道:
> The RISC-V E ISA is a reduced integer base ISA available for both rv32
> and rv64. The relevant section[1] states:
>
> "RV32E and RV64E reduce the integer register count to 16 general-purpose
> registers, (x0-x15), where x0 is a dedicated zero register."
>
> rv64e is ratified,[2] so it's a valid architecture that could be built.
> Currently both libgloss and Newlib handle the case for rv32e, but not
> rv64e. If you attempt to build for rv64e, it results in a build error
> due to accessing registers beyond the first 16. By changing the existing
> macro check to __riscv_abi_rve, this will handle both rv32e and rv64e,
> since the E ISA requires the use of either the ilp32e or lp64e ABI.
>
> [1]
> https://github.com/riscv/riscv-isa-manual/blob/e5078e55ea977ef197066dcd3f7c8e09032cb348/src/rv32e.adoc#rv32e-and-rv64e-programmers-model
> [2]
> https://github.com/riscv/riscv-isa-manual/blob/e5078e55ea977ef197066dcd3f7c8e09032cb348/src/colophon.adoc#preface
>
> Eric Salem (2):
> libgloss: riscv: Fix build for rv64e
> newlib: riscv: Fix build for rv64e
>
> libgloss/riscv/internal_syscall.h | 2 +-
> newlib/libc/machine/riscv/setjmp.S | 4 ++--
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> --
> 2.49.0
>
>
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