[PATCH v2 08/11] RISC-V: memcpy() size optimized version: Use compressed registers

[m fally]

From: Mahmoud Abumandour <ma.mandourr@gmail.com>

Replace registers t1 and t2 with registers a3 and a4 respectively,
so that the affected instructions can be compressed.

Reviewed-by: Christian Herber <christian.herber@oss.nxp.com>
Signed-off-by: Mahmoud Abumandour <ma.mandourr@gmail.com>
---
 newlib/libc/machine/riscv/memcpy-asm.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/newlib/libc/machine/riscv/memcpy-asm.S b/newlib/libc/machine/riscv/memcpy-asm.S
index d05ff5055..e9fe381d9 100644
--- a/newlib/libc/machine/riscv/memcpy-asm.S
+++ b/newlib/libc/machine/riscv/memcpy-asm.S
@@ -14,14 +14,14 @@
 .global memcpy
 .type	memcpy, @function
 memcpy:
-  mv t1, a0
+  mv a3, a0
   beqz a2, 2f
 
 1:
-  lbu t2, 0(a1)
-  sb t2, 0(t1)
+  lbu a4, 0(a1)
+  sb a4, 0(a3)
   add   a2, a2, -1
-  add   t1, t1, 1
+  add   a3, a3, 1
   add   a1, a1, 1
   bnez a2, 1b
 
-- 
2.49.0