[PATCH] clang compatibility: MCR/MRC syntax

[Volodymyr Turanskyy]

Hi,

Please see attached re-formatted patch file.

Sincerely,

Volodymyr Turanskyy | Principal Software Engineer | CE SW LLVM Team

From: Richard Earnshaw <Richard.Earnshaw@arm.com>
Date: Monday, 20 January 2025 at 15:23
To: Volodymyr Turanskyy <Volodymyr.Turanskyy@arm.com>, newlib@sourceware.org <newlib@sourceware.org>
Cc: nd <nd@arm.com>
Subject: Re: [PATCH] clang compatibility: MCR/MRC syntax
On 20/01/2025 15:09, Richard Earnshaw (lists) wrote:
> On 20/01/2025 14:46, Volodymyr Turanskyy wrote:
>> Hi,
>>
>>
>>
>> Following up on the RFC [1], please find attached a patch with some clean up:
>>
>>   * Use mrc p15 co-processor instruction syntax.
>>   * Replace adrl that is not supported in Thumb mode with add.
>>   * Explicitly specify :lower16: for taking address.
>>
>>
>>
>> References
>>
>>  1. https://sourceware.org/pipermail/newlib/2025/021452.html <https://sourceware.org/pipermail/newlib/2025/021452.html>
>>
>>
>>
>>
>>
>> Sincerely,
>>
>>
>>
>> *Volodymyr Turanskyy* | Principal Software Engineer | CE SW LLVM Team
>>
>
>
> This is OK apart from:
>
> -    mov         r7, #(VectorCode_Limit - VectorCode)
> +    mov         r7, #:lower16:(VectorCode_Limit - VectorCode)
>
> which has the problem that it implies the presence of MOVW (ie armv6t2 or later); I believe we currently support all architectures from v4 upwards.  What is the problem that the LLVM assembler can't handle here?  The difference between these two locations should be small enough that we don't need anything beyond a simple MOV instruction.
>
> R.



Hmm, ignore that.  The entire contents of this file is already gated on being built on armv7-a, so that shouldn't be a problem.

R.
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