[PATCH] Fix a bug in setjmp for MIPS o32/o64 FPXX/FP64
Corinna Vinschen
vinschen@redhat.com
Mon Dec 19 09:39:55 GMT 2022
On Dec 17 15:47, Giovanni Bajo wrote:
> It seems there is a swapped logic in one of the subcases of
> setjmp.S for MIPS: when the FPU registers are 64-bit within
> a 32-bit aligned jmp_buf, the code realigns the pointers
> before doing 64-bit writes, but the branch logic is swapped:
> we must avoid the address adjustement when bit 2 is zero
> (that is, the address is already 8-byte aligned).
>
> This always triggers an address error when run, as tested
> on a MIPS VR4300 with O64 ABI.
>
> ---
> newlib/libc/machine/mips/setjmp.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/newlib/libc/machine/mips/setjmp.S b/newlib/libc/machine/mips/setjmp.S
> index 9a8b31d09..cfc1d517a 100644
> --- a/newlib/libc/machine/mips/setjmp.S
> +++ b/newlib/libc/machine/mips/setjmp.S
> @@ -68,7 +68,7 @@
>
> #define FPR_LAYOUT \
> and $8, $4, 4; \
> - bne $8, $0, 1f; \
> + beq $8, $0, 1f; \
> GPR_OFFSET ($31, 22); \
> addiu $4, $4, -4; \
> 1: \
> --
> 2.37.0
Pushed.
Thanks,
Corinna
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