[PATCH,MIPS 1/3] Re-work setjmp/longjmp to match o32 FPXX and FP64 ABI

[Corinna Vinschen]

Hi folks,

Would anybody familiar with MIPS please have a look into Matthew's
patches?


Thanks,
Corinna


On Nov 18 11:48, Matthew Fortune wrote:
> Hi,
> 
> This patch reworks an earlier submission that updated the setjmp logic
> for 64-bit FPRs. These changes were consistent with the way in which the
> o32 ABI was implemented in GCC at the time. However, since then a large
> project has been undertaken to redefine the way in which 64-bit FPRs are
> used. The specification for this is:
> 
> https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
> 
> Binutils supports the new ABI extensions from the upcoming 2.25 release
> and from commit:
> 
> == commit 351cdf24d223290b15fa991e5052ec9e9bd1e284
> == Author: Matthew Fortune <matthew.fortune@imgtec.com>
> == Date:   Tue Jul 29 11:27:59 2014 +0100
> == [MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensions
> 
> GCC supports the new ABI extensions from the upcoming 5.0 release and from
> commit:
> 
> == r217446
> == 2014-11-12  Matthew Fortune  <matthew.fortune@imgtec.com>
> == Implement MIPS o32 FPXX, FP64, FP64A ABI extensions.
> 
> Both FPXX and FP64 require special handling when writing the FPRs as they
> must be written out using SDC1/LDC1. Since the alignment of jmpbuf is
> only 4-bytes this leads us to dynamically alter the internal structure
> of jmpbuf depending on the runtime alignment. This requires that setjmp
> and longjmp are always built with the same options and matching
> implementations are used for both in any given program. This is not a
> problem as they are in the same module.
> 
> This has been tested as part of GCC dejagnu regression testing.
> 
> Thanks,
> Matthew
> 
> newlib/
> 
> 2014-11-18  Andrew Bennett  <andrew.bennett@imgtec.com>
> 
> 	* libc/include/machine/setjmp.h [__mips__]: Remove __mips_fpr == 64
> 	from the 64-bit _JBTYPE definition.
> 	* libc/machine/mips/setjmp.S: Re-work the o32 FP64 support to match
> 	the now one-and-only supported o32 FP64 ABI extension.  Also
> 	support o32 FPXX.
> ---
>  newlib/libc/include/machine/setjmp.h |  2 +-
>  newlib/libc/machine/mips/setjmp.S    | 28 +++++++++++++++++++++++-----
>  2 files changed, 24 insertions(+), 6 deletions(-)
> 
> diff --git a/newlib/libc/include/machine/setjmp.h b/newlib/libc/include/machine/setjmp.h
> index 63fee01..596e64b 100644
> --- a/newlib/libc/include/machine/setjmp.h
> +++ b/newlib/libc/include/machine/setjmp.h
> @@ -111,7 +111,7 @@ _BEGIN_STD_C
>  #endif
>  
>  #ifdef __mips__
> -# if defined(__mips64) || (__mips_fpr == 64)
> +# if defined(__mips64)
>  #  define _JBTYPE long long
>  # endif
>  # ifdef __mips_soft_float
> diff --git a/newlib/libc/machine/mips/setjmp.S b/newlib/libc/machine/mips/setjmp.S
> index 4a93471..bd23db3 100644
> --- a/newlib/libc/machine/mips/setjmp.S
> +++ b/newlib/libc/machine/mips/setjmp.S
> @@ -41,6 +41,25 @@
>  	FPR_OFFSET ($f29, 5);	\
>  	FPR_OFFSET ($f30, 6);	\
>  	FPR_OFFSET ($f31, 7);
> +/* This deals with the o32 FPXX and FP64 cases.  Here we must use
> +   SDC1 and LDC1 to access the FPRs.  These instructions require
> +   8-byte aligned addresses.  If the jump buffer is 8-byte aligned
> +   we can not store $31 before the FPRs, as this will cause the buffer
> +   to become only 4-byte aligned.  Instead, the FPRs are placed first
> +   and $31 is put at the end.  */
> +#elif __mips_fpr == 0 || __mips_fpr == 64
> +#define FPR_LAYOUT		\
> +	and $8, $4, 4;	 	\
> +	bne $8, $0, 1f;		\
> +	GPR_OFFSET ($31, 22);	\
> +	addiu $4, $4, -4;	\
> +1:				\
> +	FPR_OFFSET ($f20, 0);  	\
> +	FPR_OFFSET ($f22, 2);	\
> +	FPR_OFFSET ($f24, 4);	\
> +	FPR_OFFSET ($f26, 6);	\
> +	FPR_OFFSET ($f28, 8);	\
> +	FPR_OFFSET ($f30, 10);
>  #else /* Assuming _MIPS_SIM == _ABIO32 */
>  #define FPR_LAYOUT		\
>  	FPR_OFFSET ($f20, 0);	\
> @@ -69,12 +88,11 @@
>  #else
>  #define LOAD_GPR lw
>  #define STORE_GPR sw
> -#if __mips_fpr == 64
> -#define BYTES_PER_WORD 8
> -#define LOAD_FPR l.d
> -#define STORE_FPR s.d
> -#else
>  #define BYTES_PER_WORD 4
> +#if __mips_fpr == 0 || __mips_fpr == 64
> +#define LOAD_FPR ldc1
> +#define STORE_FPR sdc1
> +#else
>  #define LOAD_FPR lwc1
>  #define STORE_FPR swc1
>  #endif
> -- 
> 1.9.4

-- 
Corinna Vinschen
Cygwin Maintainer
Red Hat
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