_mainCRTStartup/ctr0.S and thumb
Richard Earnshaw
rearnsha@arm.com
Mon Aug 4 09:10:00 GMT 2014
On 02/08/14 12:17, Torsten@Robitzki.de wrote:
> Hello,
> I try to build software for an arm cortex-m0 (nordic nRF51422) target using binutils (2.24), gcc (4.9) and newlib (2.1.0). I've build newlib using following configure statement:
>
> CXX=g++-4.8 CC=gcc-4.8 ${PWD}/../configure --target=arm-none-eabi --prefix=/usr/local/arm-none-eabi --enable-interwork --enable-multilib --disable-nls
>
>
> When I execute a very small C++ binary everything works fine until _mainCRTStartup gets called during startup. When I step through the code, step by step using a jtag debugger, I can follow the flow of execution till the first statement in _mainCRTStartup:
>
> here the output of arm-none-eabi-objdump -S
>
> 000000c0 <_mainCRTStartup>:
> add sl, sl, #256
> #endif
> #else
> #ifdef ARM_RDI_MONITOR
> /* Issue Angel SWI to read stack info. */
> movs r0, #AngelSWI_Reason_HeapInfo
> c0: e3b00016 movs r0, #22
> adr r1, .LC0 /* Point at ptr to 4 words to receive data. */
> c4: e28f10e8 add r1, pc, #232 ; 0xe8
> ...
>
>
> and here the output of the debugger:
>
> 00000200: 06 48 LDR R0, [PC, #+0x18]
> J-Link>s
> 00000202: 00 47 BX R0
> J-Link>s
> 000000C0: 16 00 MOV R6, R2
> J-Link>s
> 000000C2: B0 E3 B #+0x760
> J-Link>s
> 00000826: C0 46 MOV R8, R8
> ...
>
> where 00000826 is somewhere in __fp_lock_all(). To me it looks like the cortex-m0 cpu interprets arm32 opcode as thumb code, right?
>
> According to the linker map, /usr/local/arm-none-eabi/lib/gcc/arm-none-eabi/4.9.0/../../../../arm-none-eabi/lib/thumb/crt0.o is used and mapped to address c0. The disassembly of that file (using arm-none-eabi-objdump -S) yields:
>
> /usr/local/arm-none-eabi/lib/gcc/arm-none-eabi/4.9.0/../../../../arm-none-eabi/lib/thumb/crt0.o: file format elf32-littlearm
>
>
> Disassembly of section .text:
>
> 00000000 <_mainCRTStartup>:
> add sl, sl, #256
> #endif
> #else
> #ifdef ARM_RDI_MONITOR
> /* Issue Angel SWI to read stack info. */
> movs r0, #AngelSWI_Reason_HeapInfo
> 0: e3b00016 movs r0, #22
> adr r1, .LC0 /* Point at ptr to 4 words to receive data. */
> 4: e28f10e8 add r1, pc, #232 ; 0xe8
>
> can someone be so kind and shed some light on this? Any pointers on how to investigate this further are highly appreciated.
>
Cortex-m0 can only execute thumb code. It doesn't support the A32 (ARM)
instruction set.
If you've not previously built your own toolchain, I'd recommend you
look at a prebuilt embedded set of tools, such as the ones that can be
found here:
https://launchpad.net/gcc-arm-embedded
R.
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