[Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp

[Jeff Johnston]

Patch checked in.  In the future, please add a ChangeLog entry so I don't have
to make one up for you.

-- Jeff J.

----- Original Message -----
From: "Matheus Almeida" <Matheus.Almeida@imgtec.com>
To: newlib@sourceware.org
Cc: "Doug Gilmore" <Doug.Gilmore@imgtec.com>
Sent: Tuesday, November 26, 2013 6:30:04 AM
Subject: [Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp

Mips allow the width of FPU registers to be controlled by specifying the FR configuration bit:
FR=0 -> 32-bit FPU registers
FR=1 -> 64-bit FPU registers
This can be controlled by -mfp32/-mfp64 command line options.

This patch updates the definition of setjmp, longjmp and jmp_buf so that on a call to setjmp/longjmp, all the required floating-point callee-saved registers are properly saved/restored. 

We are aware that updating the size of jmp_buf can potentially break existing applications but we expect the number of applications built with FR=1 mode to be very small, possibly zero. Nevertheless this should be clearly stated in the release notes that existing applications built with FR=1 (-mfp64) need to be recompiled in order to use new versions of the library.

Regards,
Matheus

Matheus Almeida
MIPS processor IP
www.imgtec.com