[patch] Provide ARMv6-M implementation of setjmp and longjmp
Jeff Johnston
jjohnstn@redhat.com
Wed May 13 19:04:00 GMT 2009
Patch applied.
-- Jeff J.
Kazu Hirata wrote:
> Hi,
>
> Attached is a patch to add ARMv6-M implementation of setjmp and
> longjmp.
>
> Note that ARMv6-M supports Thumb only. Without this patch, setjmp.S
> doesn't even build because it uses ARM-specific instructions.
>
> This patch fixes the problem by providing ARMv6-M-specific
> implementation.
>
> Tested by building newlib with arm-none-eabi-gcc that includes ARMv6-M
> as a multilib. OK to apply?
>
> Kazu Hirata
>
> 2009-05-06 Paul Brook <paul@codesourcery.com>
>
> * libc/machine/arm/setjmp.S: Add ARMv6-M implementation.
>
> Index: newlib/libc/machine/arm/setjmp.S
> ===================================================================
> RCS file: /cvs/src/src/newlib/libc/machine/arm/setjmp.S,v
> retrieving revision 1.3
> diff -u -d -p -r1.3 setjmp.S
> --- newlib/libc/machine/arm/setjmp.S 25 Apr 2008 09:02:40 -0000 1.3
> +++ newlib/libc/machine/arm/setjmp.S 5 May 2009 15:29:15 -0000
> @@ -55,6 +55,55 @@
>
> For Thumb-2 do everything in Thumb mode. */
>
> +#if defined(__ARM_ARCH_6M__)
> +/* ARMv6-M has to be implemented in Thumb mode. */
> +
> +.thumb
> +.thumb_func
> + .globl SYM (setjmp)
> + TYPE (setjmp)
> +SYM (setjmp):
> + /* Save registers in jump buffer. */
> + stmia r0!, {r4, r5, r6, r7}
> + mov r1, r8
> + mov r2, r9
> + mov r3, r10
> + mov r4, fp
> + mov r5, sp
> + mov r6, lr
> + stmia r0!, {r1, r2, r3, r4, r5, r6}
> + sub r0, r0, #40
> + /* Restore callee-saved low regs. */
> + ldmia r0!, {r4, r5, r6, r7}
> + /* Return zero. */
> + mov r0, #0
> + bx lr
> +
> +.thumb_func
> + .globl SYM (longjmp)
> + TYPE (longjmp)
> +SYM (longjmp):
> + /* Restore High regs. */
> + add r0, r0, #16
> + ldmia r0!, {r2, r3, r4, r5, r6}
> + mov r8, r2
> + mov r9, r3
> + mov r10, r4
> + mov fp, r5
> + mov sp, r6
> + ldmia r0!, {r3} /* lr */
> + /* Restore low regs. */
> + sub r0, r0, #40
> + ldmia r0!, {r4, r5, r6, r7}
> + /* Return the result argument, or 1 if it is zero. */
> + mov r0, r1
> + bne 1f
> + mov r0, #1
> +1:
> + bx r3
> +
> +#else
> +
> #ifdef __APCS_26__
> #define RET movs pc, lr
> #elif defined(__thumb2__)
> @@ -169,4 +218,4 @@ SYM (\name):
> moveq a1, #1
>
> FUNC_END longjmp
> -
> +#endif
>
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