[newlib-cygwin] MSP430: Increase the amount of main memory available in sim ld scripts

Corinna Vinschen corinna@sourceware.org
Fri Aug 7 13:16:59 GMT 2020


https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;h=e3f29b247250f95600c93934182a00d8ae81dacf

commit e3f29b247250f95600c93934182a00d8ae81dacf
Author: Jozef Lawrynowicz <jozef.l@mittosystems.com>
Date:   Fri Aug 7 11:49:54 2020 +0100

    MSP430: Increase the amount of main memory available in sim ld scripts
    
    The main memory region of the GDB simulator ends at address 0xFFBF,
    but the simulator linker scripts do not make full use of this available
    memory.
    
    >From 61f3d212741acee583e21ff2c2808775584ecad6 Mon Sep 17 00:00:00 2001
    From: Jozef Lawrynowicz <jozef.l@mittosystems.com>
    Date: Mon, 3 Aug 2020 19:38:23 +0100
    Subject: [PATCH 2/2] MSP430: Increase the amount of main memory available in
     sim ld scripts
    
    The main memory region of the GDB simulator ends at address 0xFFBF,
    but the simulator linker scripts do not make full use of this available
    memory.

Diff:
---
 libgloss/msp430/msp430-sim.ld   | 2 +-
 libgloss/msp430/msp430xl-sim.ld | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/libgloss/msp430/msp430-sim.ld b/libgloss/msp430/msp430-sim.ld
index 5c0e3b7a7..4af48398e 100644
--- a/libgloss/msp430/msp430-sim.ld
+++ b/libgloss/msp430/msp430-sim.ld
@@ -19,7 +19,7 @@ INCLUDE intr_vectors.ld
 
 MEMORY
 {
-  RAM (w) : ORIGIN = 0x00500, LENGTH = 0x0eb00
+  RAM (w) : ORIGIN = 0x00500, LENGTH = 0x0fac0 /* END=0xffbf */
 }
 
 SECTIONS
diff --git a/libgloss/msp430/msp430xl-sim.ld b/libgloss/msp430/msp430xl-sim.ld
index 5126e398a..8d03b5c38 100644
--- a/libgloss/msp430/msp430xl-sim.ld
+++ b/libgloss/msp430/msp430xl-sim.ld
@@ -26,7 +26,7 @@ INCLUDE intr_vectors.ld
 MEMORY
 {
   RAM (rw)     : ORIGIN = 0x00500, LENGTH = 0x01b00
-  ROM (rx)     : ORIGIN = 0x02000, LENGTH = 0x0df00
+  ROM (rx)     : ORIGIN = 0x02000, LENGTH = 0x0dfc0
   /* The regions from intr_vectors.ld go here.  */
   HIFRAM (rw)  : ORIGIN = 0x10000, LENGTH = 0x80000
   HIROM (rx)   : ORIGIN = 0x90000, LENGTH = 0x70000


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