m68k problem and libstdc++
Nathan Myers
ncm-nospam@cantrip.org
Thu Jan 3 18:01:00 GMT 2002
On Thu, Jan 03, 2002 at 05:18:29PM -0800, Dale Johannesen wrote:
> On Thursday, January 3, 2002, at 04:55 PM, Craig Rodrigues wrote:
> > An assembler error is resulting:
> > Error: invalid instruction for this architecture; needs 68020 or
> > higher -- statement `cas.l %d0,%d1,(%a0)' ignored
> >
> > I suspect it is because of the code in
> > libstdc++-v3/config/cpu/m68k/atomicity.h:
> > __exchange_and_add (volatile _Atomic_word *__mem, int __val)
>
> CAS is an indivisible instruction intended to allow synchronization
> of multiple processors (the sequence above is straight out of one of
> Motorola's examples). I don't think there's any way to get that
> functionality on pre-68020 chips, so you'll have to conditionalize
> it away somehow. If supporting such chips is no longer required,
> and I would guess it's not, the easiest fix will be to pass a flag
> to the assembler telling it the target is 68020 or higher.
If the target code isn't be run on an MP system anyhow, then an
ordinary increment instruction should suffice; it only needs
not to be interruptible, but needn't invoke an uninterruptible
bus cycle.
The generic/ implementation might suffice, at a high enough
optimization level to generate the right instruction. (Of course
if you are not using threading anyway, the generic implementation
will certainly suffice.) You probably just have to jimmy configure
not to choose the m68k version.
The more general solution might be to add a new configure target,
to distinguish pre- and post-m68020 targets, and maybe specify
exactly the instructions we want.
Nathan Myers
ncm at cantrip dot org
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