[PATCH] Support multiple pagesize kernels

Steve Munroe sjmunroe@us.ibm.com
Wed Oct 5 21:39:00 GMT 2005


The recently announced POWER5+ hardware now supports 4KB, 64KB, and 16KB
pages sizes. For large systems used in High Performance Computing or
large scale data base applications a larger page size makes the TLB more
effective and boosts performance.

At this year's OLS there was discussion of adding a kernel option to
support 64KB (vs 4KB) as the base page size in these environments. I
suspect that a larger base page is an issue for IA64 as well. This
raises the possibility that the page size may change depending on which
kernel was booted for that machine. This page size will be reported via
AT_PAGESZ but currently NPTL pthread_create does not handle the larger
pagesize.

The attached patch allows PTHREAD_STACK_MIN to remain unchanged and
still apply when stackaddr is supplied. But allow the default case to
allocate the minimum 2 * pagesize stack (plus guardpage), even when
PTHREAD_STACK_MIN is < (2 * pagesize).

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