new syscall stub support for ia64 libc
David Mosberger
davidm@napali.hpl.hp.com
Fri Nov 14 06:43:00 GMT 2003
>>>>> On Thu, 13 Nov 2003 21:54:04 -0800, Ulrich Drepper <drepper@redhat.com> said:
>> Ah, perhaps ar.pfs didn't get preserved. Earlier versions of GCC
>> ignored clobbers to ar.pfs, but I don't remember exactly when it
>> was fixed.
Uli> Looks like it.
Bingo!
With gcc-3.3.2, it looks like this:
0000000000000000 <__GI___fxstat>:
0: 00 18 31 08 80 05 [MII] alloc r35=ar.pfs,12,4,0
6: f0 e0 01 12 48 c0 mov r15=1212
c: 81 68 00 84 adds r14=8,r13
10: 02 28 01 44 00 21 [MII] mov r37=r34
16: 40 02 84 2c 00 00 sxt4 r36=r33;;
1c: 00 00 04 00 nop.i 0x0
20: 0b 70 00 1c 18 10 [MMI] ld8 r14=[r14];;
26: 00 00 00 02 00 e0 nop.m 0x0
2c: e0 08 00 07 mov b7=r14;;
30: 1d 00 00 00 01 00 [MFB] nop.m 0x0
36: 00 00 00 02 00 c0 nop.f 0x0
3c: 78 00 80 10 br.call.sptk.many b6=b7;;
40: 03 70 00 02 00 24 [MII] addl r14=0,r1
46: 00 18 01 55 00 e0 mov.i ar.pfs=r35;;
4c: f0 57 18 ec cmp.eq p7,p6=-1,r10;;
50: eb 70 00 1c 18 d0 [MMI] (p07) ld8 r14=[r14];;
56: e1 70 34 00 40 00 (p07) add r14=r14,r13
5c: 00 00 04 00 nop.i 0x0;;
60: f1 00 20 1c 90 d1 [MIB] (p07) st4 [r14]=r8
66: 81 f8 f3 ff 4f 80 (p07) mov r8=-1
6c: 08 00 84 00 br.ret.sptk.many b0;;
Uli> The compiler used is gcc 3.2 based.
OK, it may well be that it was fixed between 3.2 and 3.3. Let me see
if I can track down the exact patch.
Ah, it's this one:
2003-04-25 Richard Henderson <rth@redhat.com>
* config/ia64/ia64.c (ia64_compute_frame_size): Allow inline asm
to clobber ar.pfs and ar.unat.
(ia64_expand_prologue): Force alloc instruction if ar.pfs saved;
fix test for spilling ar.pfs to the stack.
I attached the diff below.
--david
Index: config/ia64/ia64.c
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/config/ia64/ia64.c,v
retrieving revision 1.220
retrieving revision 1.221
diff -u -r1.220 -r1.221
--- config/ia64/ia64.c 24 Apr 2003 17:23:52 -0000 1.220
+++ config/ia64/ia64.c 25 Apr 2003 21:02:25 -0000 1.221
@@ -1878,6 +1878,17 @@
spill_size += 8;
n_spilled += 1;
}
+
+ if (regs_ever_live[AR_PFS_REGNUM])
+ {
+ SET_HARD_REG_BIT (mask, AR_PFS_REGNUM);
+ current_frame_info.reg_save_ar_pfs = find_gr_spill (1);
+ if (current_frame_info.reg_save_ar_pfs == 0)
+ {
+ extra_spill_size += 8;
+ n_spilled += 1;
+ }
+ }
}
/* Unwind descriptor hackery: things are most efficient if we allocate
@@ -1916,8 +1927,10 @@
}
/* If we're forced to use st8.spill, we're forced to save and restore
- ar.unat as well. */
- if (spilled_gr_p || cfun->machine->n_varargs)
+ ar.unat as well. The check for existing liveness allows inline asm
+ to touch ar.unat. */
+ if (spilled_gr_p || cfun->machine->n_varargs
+ || regs_ever_live[AR_UNAT_REGNUM])
{
regs_ever_live[AR_UNAT_REGNUM] = 1;
SET_HARD_REG_BIT (mask, AR_UNAT_REGNUM);
@@ -2378,7 +2391,8 @@
/* We don't need an alloc instruction if we've used no outputs or locals. */
if (current_frame_info.n_local_regs == 0
&& current_frame_info.n_output_regs == 0
- && current_frame_info.n_input_regs <= current_function_args_info.int_regs)
+ && current_frame_info.n_input_regs <= current_function_args_info.int_regs
+ && !TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM))
{
/* If there is no alloc, but there are input registers used, then we
need a .regstk directive. */
@@ -2540,8 +2554,8 @@
/* The alloc insn already copied ar.pfs into a general register. The
only thing we have to do now is copy that register to a stack slot
if we'd not allocated a local register for the job. */
- if (current_frame_info.reg_save_ar_pfs == 0
- && ! current_function_is_leaf)
+ if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM)
+ && current_frame_info.reg_save_ar_pfs == 0)
{
reg = gen_rtx_REG (DImode, AR_PFS_REGNUM);
do_spill (gen_movdi_x, ar_pfs_save_reg, cfa_off, reg);
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