[PATCH] riscv: Avoid vector gathers in RVV memcmp

[Jeff Law]

On 9/22/26 2:30 PM, Peter Bergner wrote:
> On 9/15/26 3:40 AM, Zhang Jinhan wrote:
>> The mismatch path gathers each mismatching byte into a new vector
>> register, moves both bytes to scalar registers, and masks off the upper
>> bits.  This is costly on implementations with slow vector gather and
>> vector-to-scalar operations.
> [snip]
>>   L(found):
>> -    vrgather.vx vtemp1, vdata1, temp
>> -    vrgather.vx vtemp2, vdata2, temp
>> -    vmv.x.s result, vtemp1
>> -    vmv.x.s temp, vtemp2
>> -    andi result, result, 0xff
>> -    andi temp, temp, 0xff
>> +    /* src1/src2 still point at the chunk bases when this branch is taken,
>> +       so the differing bytes can be loaded directly.  */
>> +    add addr, src1, temp
>> +    lbu result, 0(addr)
>> +    add addr, src2, temp
>> +    lbu temp, 0(addr)
>>       sub result, result, temp
> I agree, the vrgather.vx is a little overkill, since we only want the one
> element from the vectors.  Does replacing them with the simpler vslidedown.vx
> (same operands) help?  I'm guessing that given our use of LMUL=8 here,
> your scalar code is still faster, given the loaded chars should still be
> in the L1 cache?
My understanding is gathers often don't scale well as LMUL increases.  
So if we can do it with a slide, then that's likely better.

Jeff