[PATCH] riscv: Fix RV32 libthread_db THREAD_SELF register layout

[Shengwen Cheng]

The RISC-V libthread_db THREAD_SELF descriptor currently assumes 64-bit
general-register slots:

  REGISTER (64, 64, 4 * 8, ...)

That is correct for RV64, where tp/x4 is at byte offset 4 * 8 in the
general register set.  On RV32, general-register slots are 32-bit wide,
so tp/x4 is at byte offset 4 * 4.

Using the RV64 layout on RV32 makes libthread_db read the wrong thread
pointer value and prevents GDB from enabling pthread-aware thread
debugging.

Check __riscv_xlen and define DB_THREAD_SELF with the matching register
slot size.
---
 sysdeps/riscv/nptl/tls.h | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/sysdeps/riscv/nptl/tls.h b/sysdeps/riscv/nptl/tls.h
index b2e0f3c249..708b18007e 100644
--- a/sysdeps/riscv/nptl/tls.h
+++ b/sysdeps/riscv/nptl/tls.h
@@ -96,8 +96,15 @@ typedef struct
 
 /* Informs libthread_db that the thread pointer is register 4, which is used
  * to know how to do THREAD_SELF.  */
-# define DB_THREAD_SELF \
+# if __riscv_xlen == 64
+#  define DB_THREAD_SELF \
   REGISTER (64, 64, 4 * 8, - TLS_TCB_OFFSET - TLS_PRE_TCB_SIZE)
+# elif __riscv_xlen == 32
+#  define DB_THREAD_SELF \
+  REGISTER (32, 32, 4 * 4, - TLS_TCB_OFFSET - TLS_PRE_TCB_SIZE)
+# else
+#  error unsupported xlen
+# endif
 
 /* Access to data in the thread descriptor is easy.  */
 # include <tcb-access.h>
-- 
2.43.0