[PATCH v4] aarch64: Optimize memcpy for Kunpeng 950 processor

[Wilco Dijkstra]

Hi Weihong,
 
> For copies ≤64 bytes, the implementation remains consistent with memcpy_sve.
> For 65–128 bytes, it removes the 96-byte branch and reorders instructions, improving performance by 18–32%.
> For >128 bytes, it aligns the destination to a 32-byte boundary and uses Pre-indexed load/store instructions to reduce address-update overhead.
>
> All benchmarks report execution time (lower is better). Geomean results
>     (__memcpy_generic → this patch):
>     - bench-memcpy:      16.74 → 12.11  (28% faster)
>     - bench-memcpy-large: 24287 → 23302  (4% faster)
>     - bench-memcpy-random: 107693 → 72153 (33% faster)

Overall this looks great. I've checked it runs fine on CPUs with 128-bit SVE.
I only have one minor question about register names - see below.

Also do you intend to use DCO for this patch? If so, please use Signed-off-by
like in v1 and add "Copyright The GNU Toolchain Authors." to patched files
that don't already have it:

sysdeps/unix/sysv/linux/aarch64/cpu-features.c
sysdeps/aarch64/multiarch/memcpy_kunpeng950.S

Or alternatively post from an email that has copyright assignment with FSF -
it's up to you which you prefer.


+#define I_q    q16
+#define J_q    q17
+#define K_q    q18
+#define L_q    q19
+#define M_q    q20
+#define N_q    q21
+#define O_q    q22
+#define P_q    q23

Are these registers an artifact from v1, or is it deliberate to avoid using E,F,G,H
in the tail code? If it makes no difference, we don't need the above defines.

Cheers,
Wilco