[RFC PATCH 1/1] riscv: Add Zilsd extension support for setjmp/longjmp on RV32

[Pincheng Wang]

Hi Adhemerval Zanella Netto,

Thank you for the feedback.

On 2026/1/22 21:37, Adhemerval Zanella Netto wrote:
> 
> 
> On 22/01/26 10:22, Pincheng Wang wrote:
>> Optimize setjmp and longjmp for RV32 with the Zilsd extension by using
>> paired ld/sd to save and restore s0-s11, reducing instruction count and
>> improving performance. Zilsd adds aligned register-pair load/store on
>> RV32 using ld/sd encodings.
> 
> 
> What is the performance improvement here on real workloads? Does it really
> pays off the extra requirements to maintainability of RISC-V permutation to
>   build/test (didn't MIPS already showed us that this is not the way?)?
> 

On performance, I do not yet have numbers from representative "real 
workloads". My motivation for starting with setjmp/longjmp is that they 
are small, and structurally a good match for Zilsd because they consist 
largely of saving/restoring consecutive callee-saved registers. In the 
current form, the benefit is primarily a reduction in instruction count 
(saving/restoring s0-s11 in 6 pair operations instead of 12 word 
operations), and could provide a performance improvement for 
implementations that can make use of a wider than XLEN memory interface. 
That is the main justification I can provide at the moment.

On maintainability and build permutation, this patch is intentionally 
minmal and purely conditional within the existing RV32 implementation 
without new sysdeps directories or any configure changes. I send the 
patch as RFC because I also noticed that RV32 does not seem to receive 
much attention in glibc recently. If that is indeed the case, 
optimizations like this may end up increasing the long-term maintaince 
burden. I would therefore really appreciate clearer guidance from the 
community on whether this direction is considered worthwhile and 
maintainable, before I invest further effot in pushing it forward.

Thanks again for your time and feedback.

Best regards,
Pincheng Wang