[PATCH v2 3/4] elf: Align large load segments to PMD huge page size for THP

[WANG Rui]

Hi Florian,

On Thu, Feb 26, 2026 at 8:02 PM Florian Weimer <fweimer@redhat.com> wrote:
>
> > +#define MAX_THP_PAGESIZE (32 * 1024 * 1024)
> > +
> > +ElfW (Addr)
> > +_dl_map_segment_align (const struct loadcmd *c, ElfW (Addr) p_align_max)
> > +{
> > +  static enum malloc_thp_mode_t thp_mode = malloc_thp_mode_not_supported;
> > +  static unsigned long int thp_pagesize;
> > +
> > +#ifndef DL_MAP_SEGMENT_ALIGN_THP_DEFAULT
> > +  if (TUNABLE_GET (glibc, malloc, hugetlb, size_t, NULL) != 1)
> > +    return p_align_max;
> > +#endif
> > +
> > +  if (__glibc_unlikely (thp_mode == malloc_thp_mode_not_supported
> > +                     || thp_pagesize == 0))
> > +    {
> > +      thp_mode = __malloc_thp_mode ();
> > +      thp_pagesize = __malloc_default_thp_pagesize ();
> > +    }
> > +
> > +  /* Aligning load segments that are large enough to the PMD size helps
> > +     improve THP eligibility and reduces TLB pressure.
> > +     We cap the huge page size at MAX_THP_PAGESIZE to avoid over-aligning
> > +     on systems with very large normal pages (like 64K pages with 512M
> > +     huge pages). */
> > +  if (thp_mode == malloc_thp_mode_always && thp_pagesize <= MAX_THP_PAGESIZE
> > +      && ((c->mapstart | c->mapoff) & (thp_pagesize - 1)) == 0
> > +      && (c->mapend - c->mapstart) >= thp_pagesize
> > +      && p_align_max < thp_pagesize && (c->prot & PROT_WRITE) == 0)
> > +    return thp_pagesize;
> > +
> > +  return p_align_max;
> > +}
>
> I'm not sure if this function generalizes well beyond Loongarch.
>
> On x86-64, we could perhaps round up alignment if the CPU implements
> page coalescing in the TLB.  (This is currently not an enumerated
> feature, but fairly widely implemented.)  But we should not increase
> alignment to the THP size by default because that may move indirect
> branch targets out of the supported range of the first-line indirect
> branch predictor where things would otherwise fit.  Code TLB pressure is
> probably less of a problem than indirect branch predictor capacity.

Thanks, that’s a good point.

This change was motivated by measurements on LoongArch, but it wasn’t
intended to impose a generic “always align to THP size” policy on all
64-bit targets. In particular, the behavior is gated by the glibc
tunable glibc.malloc.hugetlb=1, so it is opt-in rather than default.

The alignment is only increased for sufficiently large, non-writable
segments, and the huge page size is capped to avoid excessive
over-alignment. Other architectures with similar large THP sizes (e.g.
32M) could potentially benefit as well.

That said, I agree the trade-off may be different on x86-64,
especially considering indirect branch predictor range effects.

Thanks,
Rui