[RFC PATCH v2 1/4] riscv: Sync hwprobe.h for compatibility

[Yao Zihong]

Add missing RISCV_HWPROBE_EXT_* definitions from recent kernel
headers so that glibc builds remain compatible with older header
sets. All additions are guarded with #ifndef, so there are no
changes when building against newer kernels.

Signed-off-by: Yao Zihong <zihong.plct@isrc.iscas.ac.cn>
---
 sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h | 212 ++++++++++++++++++++
 1 file changed, 212 insertions(+)

diff --git a/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h b/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h
index 40415aae80..8e393bd0bd 100644
--- a/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h
+++ b/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h
@@ -62,6 +62,218 @@ struct riscv_hwprobe {
 
 #endif /* RISCV_HWPROBE_KEY_MVENDORID */
 
+#ifndef RISCV_HWPROBE_EXT_ZICBOZ
+#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZBC
+#define RISCV_HWPROBE_EXT_ZBC (1 << 7)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZBKB
+#define RISCV_HWPROBE_EXT_ZBKB (1 << 8)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZBKC
+#define RISCV_HWPROBE_EXT_ZBKC (1 << 9)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZBKX
+#define RISCV_HWPROBE_EXT_ZBKX (1 << 10)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZKND
+#define RISCV_HWPROBE_EXT_ZKND (1 << 11)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZKNE
+#define RISCV_HWPROBE_EXT_ZKNE (1 << 12)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZKNH
+#define RISCV_HWPROBE_EXT_ZKNH (1 << 13)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZKSED
+#define RISCV_HWPROBE_EXT_ZKSED (1 << 14)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZKSH
+#define RISCV_HWPROBE_EXT_ZKSH (1 << 15)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZKT
+#define RISCV_HWPROBE_EXT_ZKT (1 << 16)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVBB
+#define RISCV_HWPROBE_EXT_ZVBB (1 << 17)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVBC
+#define RISCV_HWPROBE_EXT_ZVBC (1 << 18)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKB
+#define RISCV_HWPROBE_EXT_ZVKB (1 << 19)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKG
+#define RISCV_HWPROBE_EXT_ZVKG (1 << 20)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKNED
+#define RISCV_HWPROBE_EXT_ZVKNED (1 << 21)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKNHA
+#define RISCV_HWPROBE_EXT_ZVKNHA (1 << 22)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKNHB
+#define RISCV_HWPROBE_EXT_ZVKNHB (1 << 23)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKSED
+#define RISCV_HWPROBE_EXT_ZVKSED (1 << 24)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKSH
+#define RISCV_HWPROBE_EXT_ZVKSH (1 << 25)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVKT
+#define RISCV_HWPROBE_EXT_ZVKT (1 << 26)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZFH
+#define RISCV_HWPROBE_EXT_ZFH (1 << 27)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZFHMIN
+#define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZIHINTNTL
+#define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVFH
+#define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVFHMIN
+#define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZFA
+#define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZTSO
+#define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZACAS
+#define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZICOND
+#define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZIHINTPAUSE
+#define RISCV_HWPROBE_EXT_ZIHINTPAUSE (1ULL << 36)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVE32X
+#define RISCV_HWPROBE_EXT_ZVE32X (1ULL << 37)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVE32F
+#define RISCV_HWPROBE_EXT_ZVE32F (1ULL << 38)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVE64X
+#define RISCV_HWPROBE_EXT_ZVE64X (1ULL << 39)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVE64F
+#define RISCV_HWPROBE_EXT_ZVE64F (1ULL << 40)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVE64D
+#define RISCV_HWPROBE_EXT_ZVE64D (1ULL << 41)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZIMOP
+#define RISCV_HWPROBE_EXT_ZIMOP (1ULL << 42)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZCA
+#define RISCV_HWPROBE_EXT_ZCA (1ULL << 43)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZCB
+#define RISCV_HWPROBE_EXT_ZCB (1ULL << 44)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZCD
+#define RISCV_HWPROBE_EXT_ZCD (1ULL << 45)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZCF
+#define RISCV_HWPROBE_EXT_ZCF (1ULL << 46)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZCMOP
+#define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZAWRS
+#define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_SUPM
+#define RISCV_HWPROBE_EXT_SUPM (1ULL << 49)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZICNTR
+#define RISCV_HWPROBE_EXT_ZICNTR (1ULL << 50)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZIHPM
+#define RISCV_HWPROBE_EXT_ZIHPM (1ULL << 51)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZFBFMIN
+#define RISCV_HWPROBE_EXT_ZFBFMIN (1ULL << 52)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVFBFMIN
+#define RISCV_HWPROBE_EXT_ZVFBFMIN (1ULL << 53)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZVFBFWMA
+#define RISCV_HWPROBE_EXT_ZVFBFWMA (1ULL << 54)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZICBOM
+#define RISCV_HWPROBE_EXT_ZICBOM (1ULL << 55)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZAAMO
+#define RISCV_HWPROBE_EXT_ZAAMO (1ULL << 56)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZALRSC
+#define RISCV_HWPROBE_EXT_ZALRSC (1ULL << 57)
+#endif
+
+#ifndef RISCV_HWPROBE_EXT_ZABHA
+#define RISCV_HWPROBE_EXT_ZABHA (1ULL << 58)
+#endif
+
 __BEGIN_DECLS
 
 #if defined __cplusplus || !__GNUC_PREREQ (2, 7)
-- 
2.47.2