[PATCH v3 1/6] mips: Restrict the use of addiupc for microMIPSr6

[H.J. Lu]

On Wed, Sep 17, 2025 at 1:16 PM Adhemerval Zanella Netto
<adhemerval.zanella@linaro.org> wrote:
>
>
>
> On 03/09/25 10:53, Jovan Dmitrovic wrote:
> > For microMIPSr6, even though the ADDIUPC instruction is supported,
> > it requires for the address to be 4-byte aligned, which might not
> > be the case in all scenarios.
>
> The looks ok, although it is not clear to me if this is actually tested
> since it seems that mipsisa64r6el does not support -mmicromips. Should
> we add a mipsisa64r5el-linux-gnu target to build-many-glibcs.py?
>
> As a side note, it seems that mips16 is broken with --enable-profile
> or a long time and since 2.34 (035c012e32c11e84d64905efaf55e74f704d3668)
> without it:
>
> $ mips64-glibc-linux-gnu-gcc -mabi=32 -mips16 ../sysdeps/mips/start.S
> [...]
> libc/build/mips-linux-gnu-mips16/csu/start.o
> ../sysdeps/mips/start.S: Assembler messages:
> ../sysdeps/mips/start.S:147: Error: invalid operands `sw $0,16($sp)'
> [...]
>
> Should we remove mips16 support?
>

Does mips16 support 32-bit displacement for TLS? If not, it may have the same
issue as ColdFire:

https://sourceware.org/bugzilla/show_bug.cgi?id=33429

-- 
H.J.