[PATCH v2 1/3] riscv: memcpy_noalignment: Make register allocation Zca-friendly

[Yao Zihong]

On 2025-09-17, Peter Bergner wrote:
> I don't know why you changed the lw and sw insns that have a -4
> offset, since those cannot be converted into a compressed form,
> so that looks like needless churn.

The changes to the lw/sw instructions with the -4 offset in the
L(tail) part were originally made for register consistency, but they
don’t provide any benefit for Zca compression. These changes will
be dropped in the next version to keep the patch minimal.

Thanks,
Yao Zihong