[PATCH v2 1/3] riscv: memcpy_noalignment: Make register allocation Zca-friendly
Palmer Dabbelt
palmer@dabbelt.com
Mon Sep 15 14:53:11 GMT 2025
On Mon, 15 Sep 2025 07:12:53 PDT (-0700), Carlos O'Donell wrote:
> On 9/3/25 5:45 AM, Yao Zihong wrote:
>> Tidy the temporary register allocation to favor registers eligible for
>> compressed encodings when Zca/Zcb are enabled, and to slightly shorten
>> live ranges. This keeps the ABI and clobber set unchanged and does not
>> alter control flow or memory access behavior.
>
> Palmer,
>
> Switching emails since your RIVOS email bounces, likely because you've
> changed employers.
Ya, I'm at Facebook now so my Rivos email won't work. IIRC I just left
<palmer@dabbelt.com> everywhere, but sorry if I missed something. I'm
also <palmerdabbelt@meta.com>, but we don't really use email internally
and it's all outlook-ified so it'd be kind of useless for this kind of
stuff (and I assume I'm <palmerdabbelt@fb.com>, but I have no idea where
that one goes...).
> Are you still interested in reviewing RISC-V hardware enablement?
"interested" is kind of a specific word :). TBH I havn't really been
all that interested in most of the RISC-V extension stuff for a while
now: without any exciting hardware around it just kind of seems like
throwing time into a pit, particularly with the performance stuff where
being hardware-driven is what interests me. It's also not job-related
any more, so I've got even less time to work on it.
That said, it does need to get done so unless anyone else wants to do it
I'll try and keep looking. I'm adding Jeff, Vineet, and Peter as
they've expressed some interest in glibc stuff (and we've also got a
handful of other port maintainers around, who are obviously welcome to
pick stuff up if they're interested). These pings help a ton, IRC is
good too. I think I can't make the pathcwork meetings, at 6am I'm
usually on baby duty...
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