[PATCH v2 1/3] riscv: memcpy_noalignment: Make register allocation Zca-friendly

[Carlos O'Donell]

On 9/3/25 5:45 AM, Yao Zihong wrote:
> Tidy the temporary register allocation to favor registers eligible for
> compressed encodings when Zca/Zcb are enabled, and to slightly shorten
> live ranges. This keeps the ABI and clobber set unchanged and does not
> alter control flow or memory access behavior.
> 
> Motivation:
> * RISC-V compressed encodings prefer a subset of integer registers.
>    Using them where legal improves code density when Zc* is enabled.
> * Shorter live ranges also help the assembler choose compressed forms.
> 
> Details:
> * Remap temporaries to Zca-friendly registers where possible.
> * Keep argument registers and callee-saved semantics unchanged.
> * No change to barriers, aliasing, or loop structure.
> 
> No functional change.

Palmer,

This was raised during the weekly patch queue review.

Do you have someone who could help review this series?

https://patchwork.sourceware.org/project/glibc/patch/20250903094705.18253-2-zihong.plct@isrc.iscas.ac.cn/
https://patchwork.sourceware.org/project/glibc/patch/20250903094705.18253-3-zihong.plct@isrc.iscas.ac.cn/
https://patchwork.sourceware.org/project/glibc/patch/20250903094705.18253-4-zihong.plct@isrc.iscas.ac.cn/

Thank you!

-- 
Cheers,
Carlos.