Fix RISC-V soft-float _FPU_SETCW for GCC 16 set-but-not-used warnings

[Sam James]

Joseph Myers <josmyers@redhat.com> writes:

> The soft-float RISC-V definition of _FPU_SETCW results in a
> -Werror=unused-but-set-variable= build failure with GCC mainline (in
> math/setfpucw.c) because it does not use the dummy cw variable.
> Change it to (void) (cw) as on other architectures to avoid this build
> failure.
>
> Tested with build-many-glibcs.py (compilers) for
> riscv64-linux-gnu-rv64imac-lp64, which previously failed.
>
> diff --git a/sysdeps/riscv/fpu_control.h b/sysdeps/riscv/fpu_control.h
> index 29cf79f2f6..60ea737169 100644
> --- a/sysdeps/riscv/fpu_control.h
> +++ b/sysdeps/riscv/fpu_control.h
> @@ -27,7 +27,7 @@
>  # define _FPU_DEFAULT  0x00000000
>  typedef unsigned int fpu_control_t;
>  # define _FPU_GETCW(cw) (cw) = 0
> -# define _FPU_SETCW(cw) do { } while (0)
> +# define _FPU_SETCW(cw) (void) (cw)
>  extern fpu_control_t __fpu_control;
>  
>  #else /* __riscv_flen */

Reviewed-by: Sam James <sam@gentoo.org>

but please give 48 hours or so for riscv target maintainers to object.