[PATCH v2 3/3] riscv: memcpy_noalignment: Reorder to store via a3, then bump a3

Yao Zihong zihong.plct@isrc.iscas.ac.cn
Wed Sep 3 09:45:40 GMT 2025


Rewrite the copy micro-step from:

    REG_L  a4, 0(a5)
    addi   a3, a3, SZREG
    addi   a5, a5, SZREG
    REG_S  a4, -SZREG(a3)

to:

    REG_L  a4, 0(a5)
    addi   a5, a5, SZREG
    REG_S  a4, 0(a3)
    addi   a3, a3, SZREG

Semantics are unchanged: both read *(a5_old), write *(a3_old), and then
increment a3/a5 by SZREG. memcpy assumes non-overlapping regions, so the
reordering preserves correctness.

No functional change.

Signed-off-by: Yao Zihong <zihong.plct@isrc.iscas.ac.cn>
---
 sysdeps/riscv/multiarch/memcpy_noalignment.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/riscv/multiarch/memcpy_noalignment.S b/sysdeps/riscv/multiarch/memcpy_noalignment.S
index c3fb0ae731..ab01fce0c4 100644
--- a/sysdeps/riscv/multiarch/memcpy_noalignment.S
+++ b/sysdeps/riscv/multiarch/memcpy_noalignment.S
@@ -109,9 +109,9 @@ L(word_copy):
 	mv	a5, a1
 L(word_copy_loop):
 	REG_L	a4, 0(a5)
-	addi	a3, a3, SZREG
 	addi	a5, a5, SZREG
-	REG_S	a4, -SZREG(a3)
+	REG_S	a4, 0(a3)
+	addi	a3, a3, SZREG
 	bne	a3, a6, L(word_copy_loop)
 	add	a1, a1, a7
 	andi	a2, a2, SZREG-1
-- 
2.47.2



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