[EXT] [PATCH v1] ppc64le: Power 10 rawmemchr clobbers v20 (bug #33091)

[Peter Bergner]

On 10/11/25 7:26 AM, Sachin Monga wrote:
> The vector non-volatile register v20 is replaced
> with volatile register v17 for VREG_ZERO macro.

As Segher said, a little more verbosity in the git log entry wouldn't hurt.



> Signed-off-by: Sachin Monga <smonga@linux.ibm.com>

As an IBM employee who has an FSF copyright assignment on file,
you don't need this line.  Unless you are specifically intending to
contribute this patch via DCO (which is what you are doing when you add
the "Signed-off-by: ..." line) and not via the normal FSF copyright
assignment process IBMer's have always contributed under?

    https://sourceware.org/glibc/wiki/dco




> -# define VREG_ZERO v20
> +# define VREG_ZERO v17


This change is fine.


Peter