[PATCH v4 1/6] mips: Restrict the use of addiupc for microMIPSr6

[Jovan Dmitrovic]

For microMIPSr6, even though the ADDIUPC instruction is supported,
it requires for the address to be 4-byte aligned, which might not
be the case in all scenarios.
---
 sysdeps/mips/dl-machine.h | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sysdeps/mips/dl-machine.h b/sysdeps/mips/dl-machine.h
index 560bf1396c..0187541f3e 100644
--- a/sysdeps/mips/dl-machine.h
+++ b/sysdeps/mips/dl-machine.h
@@ -131,12 +131,11 @@ elf_machine_load_address (void)
        "	" STRINGXP (PTR_LA) " %0, 0f\n"
 # if !defined __mips_isa_rev || __mips_isa_rev < 6
        "	bltzal $0, 0f\n"
-       "	nop\n"
-       "0:	" STRINGXP (PTR_SUBU) " %0, $31, %0\n"
 # else
-       "0:	addiupc $31, 0\n"
-       "	" STRINGXP (PTR_SUBU) " %0, $31, %0\n"
+       "	bal 0f\n"
 # endif
+       "	nop\n"
+       "0:	" STRINGXP (PTR_SUBU) " %0, $31, %0\n"
        "	.set reorder\n"
        :	"=r" (addr)
        :	/* No inputs */
@@ -237,7 +236,9 @@ do {									\
       and not just plain _start.  */
 
 #ifndef __mips16
-# if !defined __mips_isa_rev || __mips_isa_rev < 6
+/* Although microMIPSr6 has an ADDIUPC instruction, it must be 4-byte aligned
+   for the address calculation to be valid.  */
+# if !defined __mips_isa_rev || __mips_isa_rev < 6 || defined __mips_micromips
 #  define LCOFF STRINGXP(.Lcof2)
 #  define LOAD_31 STRINGXP(bltzal $8) "," STRINGXP(.Lcof2)
 # else
-- 
2.34.1