[PATCH v2] Revert __HAVE_64B_ATOMICS configure check

[Maciej W. Rozycki]

On Thu, 13 Nov 2025, Adhemerval Zanella wrote:

> However, the NPTL semaphore code casts a sem_t to a new_sem and issues
> a 64-bit atomic operation for __HAVE_64B_ATOMICS.  Since sem_t has
> 32-bit alignment on 32-bit architectures, this prevents the use of
> 64-bit atomics even if the ABI supports them.
> 
> Assume 64-bit atomic support from __WORDSIZE, which maps to how glibc
> defines it before the broken change (m68k still explicitly sets
> __HAVE_64B_ATOMICS to 1, but since it does not have multicore support,
> it should not matter).

 This does not stand for n32 MIPS: it sets __WORDSIZE to 32 owing to the 
pointer size (ILP32), but the architecture is 64-bit and 64-bit data types 
have 64-bit alignment (just as with all the MIPS ABIs though).  Therefore 
64-bit data types can be used with all the 64-bit memory access machine 
instructions, including the atomics.

 AFAICT in the __HAVE_64B_ATOMICS == 1 case `sem_t' includes a `uint64_t' 
member, so the structure will have 64-bit alignment on the MIPS target.

  Maciej