[PATCH] Aarch64: Use oryon1's memset/memcpy for Qualcomm's oryon-2 cores

[Adhemerval Zanella Netto]

On 10/11/25 23:58, Andrew Pinski wrote:
> On Thu, Nov 6, 2025 at 8:14 AM Adhemerval Zanella Netto
> <adhemerval.zanella@linaro.org> wrote:
>>
>>
>>
>> On 05/11/25 23:05, Andrew Pinski wrote:
>>> Oryon-2 cores are very similar when it comes to performance to oryon-1
>>> cores except they include SVE support so the check for oryon-1/2 needs
>>> to moved in front of the check for SVE.
>>>
>>> Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
>>
>> How SVE memcpy/memset compares to oryon ones on oryon-2 CPUs?
> 
> The SVE memcpy/memset were 10-15% worse than the oryon ones for larger sizes.
> They were about the same for smaller sizes.
> For medium sizes the performance of the oryon ones were 1-3% better
> than the SVE ones.
> 
> Should I add that to the commit message? And do I need to respin the
> patch with that change too?

Yes please, it would be good to have some data points where this was
selected on Oryn-2.

> 
> Thanks,
> Andrew
> 
>>
>> The changes looks good.
>>
>>> ---
>>>  sysdeps/aarch64/cpu-features.h     | 4 ++++
>>>  sysdeps/aarch64/multiarch/memcpy.c | 6 +++---
>>>  sysdeps/aarch64/multiarch/memset.c | 6 +++---
>>>  3 files changed, 10 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/sysdeps/aarch64/cpu-features.h b/sysdeps/aarch64/cpu-features.h
>>> index ef4e947e8c..d74b18b39a 100644
>>> --- a/sysdeps/aarch64/cpu-features.h
>>> +++ b/sysdeps/aarch64/cpu-features.h
>>> @@ -54,6 +54,10 @@
>>>                            || (MIDR_PARTNUM(midr) == 0x002            \
>>>                                && MIDR_VARIANT(midr) == 0)))
>>>
>>> +#define IS_ORYON2(midr) (MIDR_IMPLEMENTOR(midr) == 'Q'               \
>>> +                      && MIDR_PARTNUM(midr) == 0x002         \
>>> +                      && MIDR_VARIANT(midr) != 0)
>>> +
>>>  struct cpu_features
>>>  {
>>>    uint64_t midr_el1;
>>> diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c
>>> index 894dabe2ef..a3fa006c96 100644
>>> --- a/sysdeps/aarch64/multiarch/memcpy.c
>>> +++ b/sysdeps/aarch64/multiarch/memcpy.c
>>> @@ -43,6 +43,9 @@ select_memcpy_ifunc (void)
>>>    if (mops)
>>>      return __memcpy_mops;
>>>
>>> +  if (IS_ORYON1 (midr) || IS_ORYON2 (midr))
>>> +    return __memcpy_oryon1;
>>> +
>>>    if (sve)
>>>      {
>>>        if (IS_A64FX (midr))
>>> @@ -50,9 +53,6 @@ select_memcpy_ifunc (void)
>>>        return prefer_sve_ifuncs ? __memcpy_sve : __memcpy_generic;
>>>      }
>>>
>>> -  if (IS_ORYON1 (midr))
>>> -    return __memcpy_oryon1;
>>> -
>>>    return __memcpy_generic;
>>>  }
>>>
>>> diff --git a/sysdeps/aarch64/multiarch/memset.c b/sysdeps/aarch64/multiarch/memset.c
>>> index 2b0a58b8fa..0534ae5b1b 100644
>>> --- a/sysdeps/aarch64/multiarch/memset.c
>>> +++ b/sysdeps/aarch64/multiarch/memset.c
>>> @@ -46,6 +46,9 @@ select_memset_ifunc (void)
>>>    if (mops)
>>>      return __memset_mops;
>>>
>>> +  if ((IS_ORYON1 (midr) || IS_ORYON2 (midr)) && zva_size == 64)
>>> +    return __memset_oryon1;
>>> +
>>>    if (sve)
>>>      {
>>>        if (IS_A64FX (midr) && zva_size == 256)
>>> @@ -55,9 +58,6 @@ select_memset_ifunc (void)
>>>       return __memset_sve_zva64;
>>>      }
>>>
>>> -  if (IS_ORYON1 (midr) && zva_size == 64)
>>> -    return __memset_oryon1;
>>> -
>>>    if (IS_KUNPENG920 (midr))
>>>      return __memset_kunpeng;
>>>
>>