[PATCH v2 1/1] riscv: Add RVV memset via multiarch/IFUNC

[Adhemerval Zanella Netto]

On 04/11/25 18:58, Darius Rad wrote:
> On Tue, Nov 04, 2025 at 04:44:59PM +0100, Adhemerval Zanella Netto wrote:
>>
>>
>> On 04/11/25 11:33, Darius Rad wrote:
>>> On Tue, Nov 04, 2025 at 08:37:49PM +0800, Yao Zihong wrote:
>>>> This patch adds an RVV-optimized implementation of memset for RISC-V and
>>>> enables it through the existing multiarch/IFUNC mechanism.
>>>>
>>>> The implementation integrates Hau Hsu’s 2023 RVV work under a unified
>>>> ifunc-based framework. A vectorized version (__memset_vector) is added
>>>> alongside the generic fallback (__memset_generic). The runtime resolver
>>>> selects the RVV variant when RISCV_HWPROBE_KEY_IMA_EXT_0 reports vector
>>>> support (V).
>>>
>>> This needs to use dl_hwcap, as I said before [1].
>>>
>>> [1] https://sourceware.org/pipermail/libc-alpha/2025-October/171687.html
>>>
>>>>
>>>> Tested on MUSE-Pi (SpacemiT M1) and verified by Jeff Law on BPI and
>>>> Pioneer boards with no regressions compared with glibc master.
>>>
>>> This patch certainly has regressions compared with glibc master.
>>> Presently, if one has an environment that implements the vector extension,
>>> but it is disabled at runtime with prctl, glibc will operate properly.
>>> After this patch, running in such an environment will trigger an illegal
>>> instruction fault whenever memset is run.
>>>
>>
>> How do you propose to fix PR_RISCV_V_VSTATE_CTRL_OFF for function 
>> multiversioning [1]? Last time I checked libgcc only uses risc_hwprobes [2] 
>> to do the function selection.
> 
> It could use getauxval(AT_HWCAP), as the documentation states [1]:
> 
> To get the availability of V in an ELF program, please read
> :c:macro:`COMPAT_HWCAP_ISA_V` bit of :c:macro:`ELF_HWCAP` in the auxiliary
> vector.

You may want to fix it on LLVM as well, afaiu compiler-rt has the same
issue on compiler-rt/lib/builtins/cpu_model/riscv.c.

> 
>>
>> There is also all __riscv_hwprobe consumers that might only assume it as the
>> authoritative source of hardware support.
>>
> 
> That would be their fault for making a wrong assumption and their bug to
> fix.  The prctl enable for vector has been a part of Linux for as long as
> RISCV_HWPROBE_IMA_V has.

The symbol was added with the idea to provide it as an easy way to
implement builtin_cpu_supports, but both libgcc and compiler-rt added
direct syscall support to avoid tying its support to an specific glibc.

So I don't expect the many users of this symbol, but it would be good
to at least open a bug report about PR_RISCV_V_VSTATE_CTRL_OFF iteration
(or even fix it properly on glibc).

> 
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/riscv/vector.rst