[PATCH v1 1/1] riscv: Add RVV memset via multiarch/IFUNC

Jeff Law jlaw@ventanamicro.com
Sun Nov 2 21:01:12 GMT 2025


On 10/31/25 10:25 AM, Yao Zihong wrote:
> My understanding is that the kernel may eventually make riscv_hwprobe
> reflect whether an extension is enabled, not just present, but that is
> not the case today.
> 
> I’m unsure whether it is glibc’s responsibility to cover this gap in the
> meantime.
> If it is, then perhaps we should gate the RVV path on both riscv_hwprobe
> (to ensure V = 1.0 capability) and dl_hwcap.V (to respect per-process enablement
> via prctl/sysctl).
> 
> Do you think this should be handled in glibc or left for the kernel side?
I would punt this problem for now.  Again, we do not want to be using 
dl_hwcap, at least not without some major revamping of what's in there.

If/when we see code trying to do something like disable when the 
extension is available, then we'll tackle.  But I don't think we 
want/need to worry about it yet.

Jeff


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