[PATCH] S390: Remove support for lock elision.

[Adhemerval Zanella Netto]

On 03/07/25 04:06, Stefan Liebler wrote:
> On 7/2/25 17:53, Adhemerval Zanella Netto wrote:
>>
>>
>> On 01/07/25 06:39, Stefan Liebler wrote:
>>> The support for TX lock elision of pthread mutexes on s390x is now removed.
>>>
>>> As already announced back in 2022 with z16, the used non-constrained
>>> transactions are now not usable anymore on z17
>>> (https://www.ibm.com/support/pages/system/files/inline-files/Tech%20Bytes%20May%202025%20zVM%207.4%20and%20IBM%20z17.pdf):
>>> z16 Statement of Direction:
>>> Removal of support of the transactional execution and constrained transactional
>>> execution facility: In a future IBM Z hardware system family, the transactional
>>> execution and constrained transactional execution facility will no longer be
>>> supported.  Users of the facility on current servers should always check the
>>> facility indications before use.
>>>
>>> z17 Support:
>>> Reduced support for transactional execution (TX) - Non-constrained transactions
>>> will result in unconditionally aborting with condition code 1 (CC1) and no TDB
>>> stored.
>>
>> I wonder if we still want to support it for x86 and powerpc.  If I
>> recall correctly, x86 results are mixed and on some chips TSX was
>> disabled in firmware to avoid some odd issues.  On POWER the kernel
>> added PPC_FEATURE2_HTM_NOSC to avoid some odd ssues as well.
>>
> Good question, but I can only decide it for s390x. Therefore this patch
> only covers s390x.
> Nevertheless, I've added the powerpc / x86_64 maintainers. Perhaps they
> can decide for power and x86_64.

When I added support for powerpc it was more to add feature parity with
x86 and to add a way to explore HTM/LE with pthreads.  However, I have
not heard any project that actively uses, nor any performance benefits
of using it along pthread.