[PATCH 2/7] aarch64: Use 64-bit variable to access the special registers

[Adhemerval Zanella Netto]

On 02/01/25 13:59, Wilco Dijkstra wrote:
> Hi Adhemerval/HJ,
> 
>> while tryng to use 32 bit variables with 'mrs' to get/set the
>> fpsr, dczid_el0, and ctr.  Since all of 64 bit register, use the
>> expected variable size.
> 
> dczid_el0 and ctr_el0 are actually 32 bits, but 64-bit accesses work.
>                       \
>> +   unsigned long int __fpcr;                                   \
> 
>> Will ILP32 ever be supported? If not, please add a static assert of
>> sizeof (long int) == 8.
> 
> Good point, this is not about pointer size, so using uint64_t would be better.
> 
> It's a shame that LLVM still doesn't support %w0 in inline assembler...
> 
> Cheers,
> Wilco

Alright, I will updated the patch to use uint64_t and add an static_assert.