[PATCH 5/6] AArch64: Simplify lrint

[Adhemerval Zanella Netto]

On 20/02/25 17:07, Wilco Dijkstra wrote:
> 
> Simplify lrint.
> 
> OK for commit?


LGTM, thanks.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>

> 
> ---
> 
> diff --git a/sysdeps/aarch64/fpu/s_lrint.c b/sysdeps/aarch64/fpu/s_lrint.c
> index 904c42ccd9418ff743575b1cf6ef9e83b3038770..66b3cca39952d3d4b1a3d0350620b05e96a170d2 100644
> --- a/sysdeps/aarch64/fpu/s_lrint.c
> +++ b/sysdeps/aarch64/fpu/s_lrint.c
> @@ -22,60 +22,9 @@
>  #include <math-barriers.h>
>  #include <libm-alias-double.h>
>  
> -# define IREG_SIZE 64
> -
> -# ifdef __ILP32__
> -#  define OREG_SIZE 32
> -# else
> -#  define OREG_SIZE 64
> -# endif
> -
> -# define IREGS "d"
> -
> -#if OREG_SIZE == 32
> -# define OREGS "w"
> -#else
> -# define OREGS "x"
> -#endif
> -
> -
>  long int
>  __lrint (double x)
>  {
> -
> -#if IREG_SIZE == 64 && OREG_SIZE == 32
> -  long int result;
> -
> -  if (__builtin_fabs (x) > INT32_MAX)
> -    {
> -      /* Converting large values to a 32 bit int may cause the frintx/fcvtza
> -	 sequence to set both FE_INVALID and FE_INEXACT.  To avoid this
> -	 check the rounding mode and do a single instruction with the
> -	 appropriate rounding mode.  */
> -
> -      switch (get_rounding_mode ())
> -	{
> -	case FE_TONEAREST:
> -	  asm volatile ("fcvtns" "\t%" OREGS "0, %" IREGS "1"
> -			: "=r" (result) : "w" (x));
> -	  break;
> -	case FE_UPWARD:
> -	  asm volatile ("fcvtps" "\t%" OREGS "0, %" IREGS "1"
> -			: "=r" (result) : "w" (x));
> -	  break;
> -	case FE_DOWNWARD:
> -	  asm volatile ("fcvtms" "\t%" OREGS "0, %" IREGS "1"
> -			: "=r" (result) : "w" (x));
> -	  break;
> -	case FE_TOWARDZERO:
> -	default:
> -	  asm volatile ("fcvtzs" "\t%" OREGS "0, %" IREGS "1"
> -			: "=r" (result) : "w" (x));
> -	}
> -      return result;
> -    }
> -#endif
> -
>    double r =  __builtin_rint (x);
>  
>    /* Prevent gcc from calling lrint directly when compiled with
>