[PATCH] aarch64: Improve codegen in SVE asinh.

[Wilco Dijkstra]

Hi Luna,

> Use unpredicated muls, use lanewise mla's and improve memory access.
> 1% regression in throughput microbenchmark on Neoverse V1.
> ---
> OK for master? If so please commit for me as I don't have commit rights.
> Thanks,
> Luna

OK, committed.

Cheers,
Wilco