[PATCH] aarch64: add optimised strspn/strcspn

[Wilco Dijkstra]

Hi remph,

> Requires Neon (aka. Advanced SIMD).  Looks up 16 characters at a time.
> Best case (which should be the vast majority of real-world cases) is a
> 2-3x perfomance improvement.  Worst case trades off more arithmetic for
> fewer instructions and memory accesses, and gets a 25% improvement on a
> Cortex-A52 and a 10% decline on a better-pipelined Cortex-A72.  But
> that's academic since no real-world code will hit the worst-case branch.
> There is also a ~30% speedup on the strtok & strsep benchtests.

Have you considered alternative algorithms? Even in a best-case scenario you'd
typically need 1 or 2 4-register TBLs. These are fairly slow on most implementations,
especially on older and smaller cores... If we only search for 2 characters (and NUL),
a simple loop like strchr would avoid all the setup overheads.

256 chars encoded as bits is just 32 bytes, so the worst case could be done using
a single 2-register TBL. I guess that would be about as fast as the 2nd case and 2-3
times better than the current worst-case.

Cheers,
Wilco