[PATCH] x86: Add PTL/CWF model detection support

[H.J. Lu]

On Wed, Apr 9, 2025 at 4:27 PM Sunil Pandey <skpgkp2@gmail.com> wrote:
>
>
>
> On Wed, Apr 9, 2025 at 2:50 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>>
>> On Wed, Apr 9, 2025 at 1:48 PM Sunil K Pandey <sunil.k.pandey@intel.com> wrote:
>> >
>> > From: Sunil K Pandey <skpgkp2@gmail.com>
>> >
>> > - Add PANTHERLAKE model detection.
>> > - Add CLEARWATERFOREST model detection.
>> >
>> > Intel® Architecture Instruction Set Extensions Programming Reference
>> > https://cdrdv2.intel.com/v1/dl/getContent/671368 Section 1.2.
>> >
>> > No regression, validated model detection on SDE.
>> > ---
>> >  sysdeps/x86/cpu-features.c | 8 ++++++++
>> >  1 file changed, 8 insertions(+)
>> >
>> > diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
>> > index 9d136e42ad..d3b8107dca 100644
>> > --- a/sysdeps/x86/cpu-features.c
>> > +++ b/sysdeps/x86/cpu-features.c
>> > @@ -512,6 +512,7 @@ enum
>> >    INTEL_ATOM_GOLDMONT,
>> >    INTEL_ATOM_GOLDMONT_PLUS,
>> >    INTEL_ATOM_SIERRAFOREST,
>> > +  INTEL_ATOM_CLEARWATERFOREST,
>> >    INTEL_ATOM_GRANDRIDGE,
>> >    INTEL_ATOM_TREMONT,
>> >
>> > @@ -539,6 +540,7 @@ enum
>> >    INTEL_BIGCORE_METEORLAKE,
>> >    INTEL_BIGCORE_LUNARLAKE,
>> >    INTEL_BIGCORE_ARROWLAKE,
>> > +  INTEL_BIGCORE_PANTHERLAKE,
>> >    INTEL_BIGCORE_GRANITERAPIDS,
>> >
>> >    /* Mixed (bigcore + atom SOC).  */
>> > @@ -584,6 +586,8 @@ intel_get_fam6_microarch (unsigned int model,
>> >        return INTEL_ATOM_GOLDMONT_PLUS;
>> >      case 0xAF:
>> >        return INTEL_ATOM_SIERRAFOREST;
>> > +    case 0xDD:
>> > +      return INTEL_ATOM_CLEARWATERFOREST;
>> >      case 0xB6:
>> >        return INTEL_ATOM_GRANDRIDGE;
>> >      case 0x86:
>> > @@ -693,6 +697,8 @@ intel_get_fam6_microarch (unsigned int model,
>> >        return INTEL_BIGCORE_LUNARLAKE;
>> >      case 0xc6:
>> >        return INTEL_BIGCORE_ARROWLAKE;
>> > +    case 0xCC:
>> > +      return INTEL_BIGCORE_PANTHERLAKE;
>>
>> Linux kernel has
>>
>> #define INTEL_ARROWLAKE_H               IFM(6, 0xC5) /* Lion Cove / Skymont */
>> #define INTEL_ARROWLAKE                 IFM(6, 0xC6)
>> #define INTEL_ARROWLAKE_U               IFM(6, 0xB5)
>>
>> Please also add the missing ones.
>>
>
> I can add it like this but the current SDE only accepts a single ArrowLake option "-arl' and
> corresponding model is 0xC5. I'm not sure how to test other ArrowLake models(0xB5)
>  with the current SDE.
>
> -    case 0xc6:
> +    case 0xB5:
> +    case 0xC5:
> +    case 0xC6:
>        return INTEL_BIGCORE_ARROWLAKE;
>
> Ok?

Yes.

> The other missing one is
>
> /* Family 19 */
> #define INTEL_PANTHERCOVE_X             IFM(19, 0x01) /* Diamond Rapids */
>
> I will add it in the next patch as it belongs to the new processor family(19).

Yes.

>
>>
>> >      case 0xAD:
>> >      case 0xAE:
>> >        return INTEL_BIGCORE_GRANITERAPIDS;
>> > @@ -808,6 +814,7 @@ init_cpu_features (struct cpu_features *cpu_features)
>> >             Default tuned atom microarch.
>> >             case INTEL_ATOM_SIERRAFOREST:
>> >             case INTEL_ATOM_GRANDRIDGE:
>> > +           case INTEL_ATOM_CLEARWATERFOREST:
>> >            */
>> >
>> >               /* Bigcore/Default Tuning.  */
>> > @@ -865,6 +872,7 @@ init_cpu_features (struct cpu_features *cpu_features)
>> >             case INTEL_BIGCORE_METEORLAKE:
>> >             case INTEL_BIGCORE_LUNARLAKE:
>> >             case INTEL_BIGCORE_ARROWLAKE:
>> > +           case INTEL_BIGCORE_PANTHERLAKE:
>> >             case INTEL_BIGCORE_SAPPHIRERAPIDS:
>> >             case INTEL_BIGCORE_EMERALDRAPIDS:
>> >             case INTEL_BIGCORE_GRANITERAPIDS:
>> > --
>> > 2.49.0
>> >
>>
>>
>> --
>> H.J.



-- 
H.J.