risc-v: Enable vectorized memset via ifunc

[Jeff Law]

This patch adds the ability for glibc to select a vectorized memset 
implementation for RISC-V using the ifunc/hwprobe mechanism.

Implementation on the ifunc/hwprobe is quite simple.  We call hwprobe 
with the right key and we check the returned value to see if vector is 
enabled.  If so, then we use the vector memset implementation.  Else we 
fall back to the generic memset implementation.

The guts of the memset itself are quite simple as well and represent a 
generic vector implementation for riscv.  In particular we use a VLA 
style loop where each iteration of the loop tries to handle as much data 
as the cpu core indicates it can reasonably handle.  On something like 
the spacemit design we can handle up to 256 bytes of data per loop 
iteration (256bit vector length * LMUL8).

Naturally this has been tested with the glibc testsuite.  I've tested on 
kernels with and without hwprobe support.  For the latter we naturally 
only use memset_generic.

The memset implementation is originally from Hau Hsu (SiFive), posted to 
libc-alpha back in May 2023.  Sergei from Rivos posted an alternate, 
more complex implementation back in Feb 2023.  I took the simpler 
implementation largely because it included performance data.  Sergei's 
could well be better, but it likely depends on uarch details like 
quality of branch predictors as Sergei's has multiple conditional 
branches to select between a few variants.

I've got several other of these routines queued up that I'll submit once 
we're acked on memset.  Obviously any feedback on memset will be 
incorporated into the other routines.

OK for the trunk?

Thanks,
Jeff







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