[PATCH v2] aarch64: Fix AdvSIMD libmvec routines for big-endian

[Szabolcs Nagy]

The 05/02/2024 16:43, Joe Ramsay wrote:
> Previously many routines used * to load from vector types stored
> in the data table. This is emitted as ldr, which byte-swaps the
> entire vector register, and causes bugs for big-endian when not
> all lanes contain the same value. When a vector is to be used
> this way, it has been replaced with an array and the load with an
> explicit ld1 intrinsic, which byte-swaps only within lanes.
> 
> As well, many routines previously used non-standard GCC syntax
> for vector operations such as indexing into vectors types with []
> and assembling vectors using {}. This syntax should not be mixed
> with ACLE, as the former does not respect endianness whereas the
> latter does. Such examples have been replaced with, for instance,
> vcombine_* and vgetq_lane* intrinsics. Helpers which only use the
> GCC syntax, such as the v_call helpers, do not need changing as
> they do not use intrinsics.

Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>

and committed.


> ---
> Changes from v1:
> - More detailed commit message
> Thanks,
> Joe