[PATCH v2 2/2] Aarch64: Add new memset for Qualcomm's 0ryon-1 core

[Florian Weimer]

* Andrew Pinski:

> +L(try_zva):
> +	/* Write the first and last 64 byte aligned block using stp rather
> +	   than using DC ZVA.  This is faster on some cores.
> +	 */

The “some cores” part seems outdated if it's just a memset for the
Oryon-1 core (singulare).  This comment and some others, for example

> +	/*
> +	 * Adjust count and bias for loop. By subtracting extra 1 from count,
> +	 * it is easy to use tbz instruction to check whether loop tailing
> +	 * count is less than 33 bytes, so as to bypass 2 unnecessary stps.
> +	 */

do not use GNU style.  This one is GNU style:

> +	/* Set 64..96 bytes.  Write 64 bytes from the start and
> +	   32 bytes from the end.  */

No separate start end end lines, no * indentation, space after the final .

Thanks,
Florian