[PATCH v2 0/3] RISC-V: ifunced memcpy using new kernel hwprobe interface

Adhemerval Zanella Netto adhemerval.zanella@linaro.org
Wed Mar 29 19:16:39 GMT 2023



On 28/03/23 21:01, Palmer Dabbelt wrote:
> On Tue, 28 Mar 2023 16:41:10 PDT (-0700), adhemerval.zanella@linaro.org wrote:
>>
>>
>> On 28/03/23 19:54, Palmer Dabbelt wrote:
>>> On Tue, 21 Feb 2023 11:15:34 PST (-0800), Evan Green wrote:
>>>>
>>>> This series illustrates the use of a proposed Linux syscall that
>>>> enumerates architectural information about the RISC-V cores the system
>>>> is running on. In this series we expose a small wrapper function around
>>>> the syscall. An ifunc selector for memcpy queries it to see if unaligned
>>>> access is "fast" on this hardware. If it is, it selects a newly provided
>>>> implementation of memcpy that doesn't work hard at aligning the src and
>>>> destination buffers.
>>>>
>>>> This is somewhat of a proof of concept for the syscall itself, but I do
>>>> find that in my goofy memcpy test [1], the unaligned memcpy performed at
>>>> least as well as the generic C version. This is however on Qemu on an M1
>>>> mac, so not a test of any real hardware (more a smoke test that the
>>>> implementation isn't silly).
>>>
>>> QEMU isn't a good enough benchmark to justify a new memcpy routine in glibc.  Evan has a D1, which does support misaligned access and runs some simple benchmarks faster.  There's also been some minor changes to the Linux side of things that warrant a v3 anyway, so he'll just post some benchmarks on HW along with that.
>>>
>>> Aside from those comments,
>>>
>>> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
>>>
>>> There's a lot more stuff to probe for, but I think we've got enough of a proof of concept for the hwprobe stuff that we can move forward with the core interface bits in Linux/glibc and then unleash the chaos...
>>>
>>> Unless anyone else has comments?
>>
>> Until riscv_hwprobe is not on Linus tree as official Linux ABI this patchset
>> can not be installed.  We failed to enforce it on some occasion (like Intel
>> CET) and it turned out a complete mess after some years...
> 
> Sorry if that wasn't clear, I was asking if there were any more comments from the glibc side of things before merging the Linux code.

Right, so is this already settle to be the de-factor ABI to query for system
information in RISCV? Or is it still being discussed? Is it in a next branch
already, and/or have been tested with a patch glibc?

In any case I added some minimal comments.  With the vDSO approach I think
there is no need to cache the result at startup, as aarch64 and x86 does.


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